Lines Matching refs:sys_write32

222 	sys_write32(bdf << PCIE_ECAM_BDF_SHIFT, data->cfg_addr + PCIE_EXT_CFG_INDEX);  in pcie_brcmstb_map_bus()
246 sys_write32(data, conf_addr); in pcie_brcmstb_conf_write()
405 sys_write32(pcie_brcmstb_mdio_from_pkt(port, regad, MDIO_CMD_WRITE), in pcie_brcmstb_mdio_write()
407 sys_write32(MDIO_DATA_DONE_MASK | wrdata, base + PCIE_RC_DL_MDIO_WR_DATA); in pcie_brcmstb_mdio_write()
433 sys_write32(lower_32_bits(pcie_addr), data->cfg_addr + PCIE_MEM_WIN0_LO(win)); in pcie_brcmstb_set_outbound_win()
434 sys_write32(upper_32_bits(pcie_addr), data->cfg_addr + PCIE_MEM_WIN0_HI(win)); in pcie_brcmstb_set_outbound_win()
448 sys_write32(tmp, data->cfg_addr + PCIE_MEM_WIN0_BASE_LIMIT(win)); in pcie_brcmstb_set_outbound_win()
454 sys_write32(tmp, data->cfg_addr + PCIE_MEM_WIN0_BASE_HI(win)); in pcie_brcmstb_set_outbound_win()
460 sys_write32(tmp, data->cfg_addr + PCIE_MEM_WIN0_LIMIT_HI(win)); in pcie_brcmstb_set_outbound_win()
475 sys_write32(tmp, data->cfg_addr + PCIE_RC_PL_PHY_CTL_15); in pcie_brcmstb_setup()
482 sys_write32(tmp, data->cfg_addr + PCIE_MISC_MISC_CTRL); in pcie_brcmstb_setup()
491 sys_write32(tmp, data->cfg_addr + PCIE_MISC_RC_BAR2_CONFIG_LO); in pcie_brcmstb_setup()
492 sys_write32(upper_32_bits(rc_bar2_offset), data->cfg_addr + PCIE_MISC_RC_BAR2_CONFIG_HI); in pcie_brcmstb_setup()
496 sys_write32(tmp, data->cfg_addr + PCIE_MISC_UBUS_BAR2_CONFIG_REMAP); in pcie_brcmstb_setup()
503 sys_write32(tmp, data->cfg_addr + PCIE_MISC_MISC_CTRL); in pcie_brcmstb_setup()
508 sys_write32(tmp, data->cfg_addr + PCIE_MISC_UBUS_CTRL); in pcie_brcmstb_setup()
509 sys_write32(0xffffffff, data->cfg_addr + PCIE_MISC_AXI_READ_ERROR_DATA); in pcie_brcmstb_setup()
512 sys_write32(BCM2712_UBUS_TIMEOUT_TICKS, data->cfg_addr + PCIE_MISC_UBUS_TIMEOUT); in pcie_brcmstb_setup()
513 sys_write32(BCM2712_RC_CONFIG_RETRY_TIMEOUT_TICKS, in pcie_brcmstb_setup()
518 sys_write32(tmp, data->cfg_addr + PCIE_MISC_RC_BAR1_CONFIG_LO); in pcie_brcmstb_setup()
522 sys_write32(tmp, data->cfg_addr + PCIE_MISC_RC_BAR3_CONFIG_LO); in pcie_brcmstb_setup()
529 sys_write32(tmp, data->cfg_addr + BRCM_PCIE_CAP_REGS + PCI_EXP_LNKCAP); in pcie_brcmstb_setup()
537 sys_write32(tmp, data->cfg_addr + PCIE_RC_CFG_PRIV1_ID_VAL3); in pcie_brcmstb_setup()
543 sys_write32(tmp, data->cfg_addr + PCIE_RC_CFG_VENDOR_VENDOR_SPECIFIC_REG1); in pcie_brcmstb_setup()
576 sys_write32(tmp, data->cfg_addr + PCIE_MISC_PCIE_CTRL); in pcie_brcmstb_init()
583 sys_write32(tmp, data->cfg_addr + PCI_COMMAND); in pcie_brcmstb_init()
594 sys_write32(config->regs[i].addr, data->cfg_addr + PCIE_EXT_CFG_DATA + in pcie_brcmstb_init()
601 sys_write32(tmp, data->cfg_addr + PCIE_EXT_CFG_DATA + PCI_COMMAND); in pcie_brcmstb_init()