Lines Matching +full:address +full:- +full:aligned
4 * SPDX-License-Identifier: Apache-2.0
50 #define TLB_PADDR_MASK ((1 << TLB_PADDR_SIZE) - 1)
58 * @param vaddr Page-aligned virtual address.
63 return (POINTER_TO_UINT(vaddr) - CONFIG_KERNEL_VM_BASE) / in get_tlb_entry_idx()
78 * As the main memory is in cached address ranges, in sys_mm_drv_map_page()
79 * the cached physical address is needed to perform in sys_mm_drv_map_page()
87 /* Make sure inputs are page-aligned */ in sys_mm_drv_map_page()
90 ret = -EINVAL; in sys_mm_drv_map_page()
94 /* Check bounds of physical address space */ in sys_mm_drv_map_page()
97 ret = -EINVAL; in sys_mm_drv_map_page()
101 /* Check bounds of virtual address space */ in sys_mm_drv_map_page()
104 ret = -EINVAL; in sys_mm_drv_map_page()
113 * The address part of the TLB entry takes the lowest in sys_mm_drv_map_page()
117 * can be accessed via two addresses. One address goes in sys_mm_drv_map_page()
123 * address. in sys_mm_drv_map_page()
167 /* Use cached virtual address */ in sys_mm_drv_unmap_page()
170 /* Check bounds of virtual address space */ in sys_mm_drv_unmap_page()
173 ret = -EINVAL; in sys_mm_drv_unmap_page()
177 /* Make sure inputs are page-aligned */ in sys_mm_drv_unmap_page()
179 ret = -EINVAL; in sys_mm_drv_unmap_page()
215 /* Use cached address */ in sys_mm_drv_page_phys_get()
219 ret = -EINVAL; in sys_mm_drv_page_phys_get()
223 /* Check bounds of virtual address space */ in sys_mm_drv_page_phys_get()
226 ret = -EINVAL; in sys_mm_drv_page_phys_get()
233 ret = -EFAULT; in sys_mm_drv_page_phys_get()