4  * SPDX-License-Identifier: Apache-2.0
18 #define ART_L           0x00 /* ART lower 32 bit reg */
19 #define ART_H           0x04 /* ART higher 32 bit reg */
20 #define CTL             0x10 /* TGPIO control reg */
21 #define COMPV31_0       0x20 /* Comparator lower 32 bit reg */
22 #define COMPV63_32      0x24 /* Comparator higher 32 bit reg */
23 #define PIV31_0         0x28 /* Periodic Interval lower 32 bit reg */
24 #define PIV63_32        0x2c /* Periodic Interval higher 32 bit reg */
25 #define TCV31_0         0x30 /* Time Capture lower 32 bit reg */
26 #define TCV63_32        0x34 /* Time Capture higher 32 bit reg */
27 #define ECCV31_0        0x38 /* Event Counter Capture lower 32 bit reg */
28 #define ECCV63_32       0x3c /* Event Counter Capture higher 32 bit reg */
29 #define EC31_0          0x40 /* Event Counter lower 32 bit reg */
30 #define EC63_32         0x44 /* Event Counter higher 32 bit reg */
31 #define REGSET_SIZE     0x100 /* Difference between 0 and 1 */
32 #define UINT32_MASK     0xFFFFFFFF /* 32 bit Mask */
33 #define UINT32_SIZE     32
36 #define CTL_EN                  BIT(0) /* Control enable */
39 #define CTL_EP_RISING_EDGE      (0 << 2) /* Rising edge */
46 	((const struct tgpio_config *)(_dev)->config)
48 #define DEV_DATA(_dev) ((struct tgpio_runtime *)(_dev)->data)
73 	return 0;  in tgpio_intel_get_time()
79 	*cycles = DEV_CFG(dev)->art_clock_freq;  in tgpio_intel_cyc_per_sec()
81 	return 0;  in tgpio_intel_cyc_per_sec()
89 	if (pin >= DEV_CFG(dev)->max_pins) {  in tgpio_intel_pin_disable()
90 		return -EINVAL;  in tgpio_intel_pin_disable()
96 	return 0;  in tgpio_intel_pin_disable()
108 	if (pin >= DEV_CFG(dev)->max_pins) {  in tgpio_intel_periodic_output()
109 		return -EINVAL;  in tgpio_intel_periodic_output()
127 	val = 0;  in tgpio_intel_periodic_output()
138 	return 0;  in tgpio_intel_periodic_output()
148 	if (pin >= DEV_CFG(dev)->max_pins) {  in tgpio_intel_config_external_timestamp()
149 		return -EINVAL;  in tgpio_intel_config_external_timestamp()
156 	if (event_polarity == 0) {  in tgpio_intel_config_external_timestamp()
171 	return 0;  in tgpio_intel_config_external_timestamp()
179 	if (pin >= DEV_CFG(dev)->max_pins) {  in tgpio_intel_read_ts_ec()
180 		return -EINVAL;  in tgpio_intel_read_ts_ec()
188 	return 0;  in tgpio_intel_read_ts_ec()
205 	device_map(&rt->reg_base,  in tgpio_init()
206 		   cfg->reg_base.phys_addr & ~0xFFU,  in tgpio_init()
207 		   cfg->reg_base.size,  in tgpio_init()
210 	return 0;  in tgpio_init()