Lines Matching +full:data +full:- +full:lanes
7 * SPDX-License-Identifier: Apache-2.0
61 const struct mipi_dsi_stm32_config *config = dev->config; in mipi_dsi_stm32_log_config()
62 struct mipi_dsi_stm32_data *data = dev->data; in mipi_dsi_stm32_log_config() local
64 LOG_DBG("DISPLAY: pix %d kHz, lane %d kHz", data->pixel_clk_khz, data->lane_clk_khz); in mipi_dsi_stm32_log_config()
66 LOG_DBG(" AutomaticClockLaneControl 0x%x", data->hdsi.Init.AutomaticClockLaneControl); in mipi_dsi_stm32_log_config()
67 LOG_DBG(" TXEscapeCkdiv %u", data->hdsi.Init.TXEscapeCkdiv); in mipi_dsi_stm32_log_config()
68 LOG_DBG(" NumberOfLanes %u", data->hdsi.Init.NumberOfLanes); in mipi_dsi_stm32_log_config()
69 LOG_DBG(" PLLNDIV %u", data->pll_init.PLLNDIV); in mipi_dsi_stm32_log_config()
70 LOG_DBG(" PLLIDF %u", data->pll_init.PLLIDF); in mipi_dsi_stm32_log_config()
71 LOG_DBG(" PLLODF %u", data->pll_init.PLLODF); in mipi_dsi_stm32_log_config()
74 LOG_DBG(" VirtualChannelID %u", data->vid_cfg.VirtualChannelID); in mipi_dsi_stm32_log_config()
75 LOG_DBG(" ColorCoding 0x%x", data->vid_cfg.ColorCoding); in mipi_dsi_stm32_log_config()
76 LOG_DBG(" LooselyPacked 0x%x", data->vid_cfg.LooselyPacked); in mipi_dsi_stm32_log_config()
77 LOG_DBG(" Mode 0x%x", data->vid_cfg.Mode); in mipi_dsi_stm32_log_config()
78 LOG_DBG(" PacketSize %u", data->vid_cfg.PacketSize); in mipi_dsi_stm32_log_config()
79 LOG_DBG(" NumberOfChunks %u", data->vid_cfg.NumberOfChunks); in mipi_dsi_stm32_log_config()
80 LOG_DBG(" NullPacketSize %u", data->vid_cfg.NullPacketSize); in mipi_dsi_stm32_log_config()
81 LOG_DBG(" HSPolarity 0x%x", data->vid_cfg.HSPolarity); in mipi_dsi_stm32_log_config()
82 LOG_DBG(" VSPolarity 0x%x", data->vid_cfg.VSPolarity); in mipi_dsi_stm32_log_config()
83 LOG_DBG(" DEPolarity 0x%x", data->vid_cfg.DEPolarity); in mipi_dsi_stm32_log_config()
84 LOG_DBG(" HorizontalSyncActive %u", data->vid_cfg.HorizontalSyncActive); in mipi_dsi_stm32_log_config()
85 LOG_DBG(" HorizontalBackPorch %u", data->vid_cfg.HorizontalBackPorch); in mipi_dsi_stm32_log_config()
86 LOG_DBG(" HorizontalLine %u", data->vid_cfg.HorizontalLine); in mipi_dsi_stm32_log_config()
87 LOG_DBG(" VerticalSyncActive %u", data->vid_cfg.VerticalSyncActive); in mipi_dsi_stm32_log_config()
88 LOG_DBG(" VerticalBackPorch %u", data->vid_cfg.VerticalBackPorch); in mipi_dsi_stm32_log_config()
89 LOG_DBG(" VerticalFrontPorch %u", data->vid_cfg.VerticalFrontPorch); in mipi_dsi_stm32_log_config()
90 LOG_DBG(" VerticalActive %u", data->vid_cfg.VerticalActive); in mipi_dsi_stm32_log_config()
91 LOG_DBG(" LPCommandEnable 0x%x", data->vid_cfg.LPCommandEnable); in mipi_dsi_stm32_log_config()
92 LOG_DBG(" LPLargestPacketSize %u", data->vid_cfg.LPLargestPacketSize); in mipi_dsi_stm32_log_config()
93 LOG_DBG(" LPVACTLargestPacketSize %u", data->vid_cfg.LPVACTLargestPacketSize); in mipi_dsi_stm32_log_config()
94 LOG_DBG(" LPHorizontalFrontPorchEnable 0x%x", data->vid_cfg.LPHorizontalFrontPorchEnable); in mipi_dsi_stm32_log_config()
95 LOG_DBG(" LPHorizontalBackPorchEnable 0x%x", data->vid_cfg.LPHorizontalBackPorchEnable); in mipi_dsi_stm32_log_config()
96 LOG_DBG(" LPVerticalActiveEnable 0x%x", data->vid_cfg.LPVerticalActiveEnable); in mipi_dsi_stm32_log_config()
97 LOG_DBG(" LPVerticalFrontPorchEnable 0x%x", data->vid_cfg.LPVerticalFrontPorchEnable); in mipi_dsi_stm32_log_config()
98 LOG_DBG(" LPVerticalBackPorchEnable 0x%x", data->vid_cfg.LPVerticalBackPorchEnable); in mipi_dsi_stm32_log_config()
99 LOG_DBG(" LPVerticalSyncActiveEnable 0x%x", data->vid_cfg.LPVerticalSyncActiveEnable); in mipi_dsi_stm32_log_config()
100 LOG_DBG(" FrameBTAAcknowledgeEnable 0x%x", data->vid_cfg.FrameBTAAcknowledgeEnable); in mipi_dsi_stm32_log_config()
102 if (config->active_errors) { in mipi_dsi_stm32_log_config()
103 LOG_DBG("HAL_DSI_ConfigErrorMonitor: 0x%x", config->active_errors); in mipi_dsi_stm32_log_config()
106 if (config->lp_rx_filter_freq) { in mipi_dsi_stm32_log_config()
107 LOG_DBG("HAL_DSI_SetLowPowerRXFilter: %d", config->lp_rx_filter_freq); in mipi_dsi_stm32_log_config()
110 if (data->host_timeouts) { in mipi_dsi_stm32_log_config()
111 DSI_HOST_TimeoutTypeDef *ht = data->host_timeouts; in mipi_dsi_stm32_log_config()
114 LOG_DBG(" TimeoutCkdiv %u", ht->TimeoutCkdiv); in mipi_dsi_stm32_log_config()
115 LOG_DBG(" HighSpeedTransmissionTimeout %u", ht->HighSpeedTransmissionTimeout); in mipi_dsi_stm32_log_config()
116 LOG_DBG(" LowPowerReceptionTimeout %u", ht->LowPowerReceptionTimeout); in mipi_dsi_stm32_log_config()
117 LOG_DBG(" HighSpeedReadTimeout %u", ht->HighSpeedReadTimeout); in mipi_dsi_stm32_log_config()
118 LOG_DBG(" LowPowerReadTimeout %u", ht->LowPowerReadTimeout); in mipi_dsi_stm32_log_config()
119 LOG_DBG(" HighSpeedWriteTimeout %u", ht->HighSpeedWriteTimeout); in mipi_dsi_stm32_log_config()
120 LOG_DBG(" HighSpeedWritePrespMode %u", ht->HighSpeedWritePrespMode); in mipi_dsi_stm32_log_config()
121 LOG_DBG(" LowPowerWriteTimeout %u", ht->LowPowerWriteTimeout); in mipi_dsi_stm32_log_config()
122 LOG_DBG(" BTATimeout %u", ht->BTATimeout); in mipi_dsi_stm32_log_config()
125 if (data->phy_timings) { in mipi_dsi_stm32_log_config()
127 LOG_DBG(" ClockLaneHS2LPTime %u", data->phy_timings->ClockLaneHS2LPTime); in mipi_dsi_stm32_log_config()
128 LOG_DBG(" ClockLaneLP2HSTime %u", data->phy_timings->ClockLaneLP2HSTime); in mipi_dsi_stm32_log_config()
129 LOG_DBG(" DataLaneHS2LPTime %u", data->phy_timings->DataLaneHS2LPTime); in mipi_dsi_stm32_log_config()
130 LOG_DBG(" DataLaneLP2HSTime %u", data->phy_timings->DataLaneLP2HSTime); in mipi_dsi_stm32_log_config()
131 LOG_DBG(" DataLaneMaxReadTime %u", data->phy_timings->DataLaneMaxReadTime); in mipi_dsi_stm32_log_config()
132 LOG_DBG(" StopWaitTime %u", data->phy_timings->StopWaitTime); in mipi_dsi_stm32_log_config()
138 const struct mipi_dsi_stm32_config *config = dev->config; in mipi_dsi_stm32_host_init()
139 struct mipi_dsi_stm32_data *data = dev->data; in mipi_dsi_stm32_host_init() local
143 switch (config->data_lanes) { in mipi_dsi_stm32_host_init()
145 data->hdsi.Init.NumberOfLanes = DSI_ONE_DATA_LANE; in mipi_dsi_stm32_host_init()
148 data->hdsi.Init.NumberOfLanes = DSI_TWO_DATA_LANES; in mipi_dsi_stm32_host_init()
151 LOG_ERR("Number of DSI lanes (%d) not supported!", config->data_lanes); in mipi_dsi_stm32_host_init()
152 return -ENOTSUP; in mipi_dsi_stm32_host_init()
155 ret = clock_control_get_rate(config->rcc, (clock_control_subsys_t)&config->pix_clk, in mipi_dsi_stm32_host_init()
156 &data->pixel_clk_khz); in mipi_dsi_stm32_host_init()
162 data->pixel_clk_khz /= 1000; in mipi_dsi_stm32_host_init()
163 ret = clock_control_get_rate(config->rcc, (clock_control_subsys_t)&config->ref_clk, in mipi_dsi_stm32_host_init()
171 data->lane_clk_khz = hse_clock / data->pll_init.PLLIDF * 2 * data->pll_init.PLLNDIV / 2 / in mipi_dsi_stm32_host_init()
172 (1UL << data->pll_init.PLLODF) / 8 / 1000; in mipi_dsi_stm32_host_init()
175 data->hdsi.Init.TXEscapeCkdiv = 0; in mipi_dsi_stm32_host_init()
177 if ((data->lane_clk_khz / i) <= MAX_TX_ESC_CLK_KHZ) { in mipi_dsi_stm32_host_init()
178 data->hdsi.Init.TXEscapeCkdiv = i; in mipi_dsi_stm32_host_init()
183 if (data->hdsi.Init.TXEscapeCkdiv < 2) { in mipi_dsi_stm32_host_init()
187 ret = HAL_DSI_Init(&data->hdsi, &data->pll_init); in mipi_dsi_stm32_host_init()
190 return -ret; in mipi_dsi_stm32_host_init()
193 if (data->host_timeouts) { in mipi_dsi_stm32_host_init()
194 ret = HAL_DSI_ConfigHostTimeouts(&data->hdsi, data->host_timeouts); in mipi_dsi_stm32_host_init()
197 return -ret; in mipi_dsi_stm32_host_init()
201 if (data->phy_timings) { in mipi_dsi_stm32_host_init()
202 ret = HAL_DSI_ConfigPhyTimer(&data->hdsi, data->phy_timings); in mipi_dsi_stm32_host_init()
205 return -ret; in mipi_dsi_stm32_host_init()
209 ret = HAL_DSI_ConfigFlowControl(&data->hdsi, DSI_FLOW_CONTROL_BTA); in mipi_dsi_stm32_host_init()
212 return -ret; in mipi_dsi_stm32_host_init()
215 if (config->lp_rx_filter_freq) { in mipi_dsi_stm32_host_init()
216 ret = HAL_DSI_SetLowPowerRXFilter(&data->hdsi, config->lp_rx_filter_freq); in mipi_dsi_stm32_host_init()
219 return -ret; in mipi_dsi_stm32_host_init()
223 ret = HAL_DSI_ConfigErrorMonitor(&data->hdsi, config->active_errors); in mipi_dsi_stm32_host_init()
226 return -ret; in mipi_dsi_stm32_host_init()
236 const struct mipi_dsi_stm32_config *config = dev->config; in mipi_dsi_stm32_attach()
237 struct mipi_dsi_stm32_data *data = dev->data; in mipi_dsi_stm32_attach() local
238 DSI_VidCfgTypeDef *vcfg = &data->vid_cfg; in mipi_dsi_stm32_attach()
241 if (!(mdev->mode_flags & MIPI_DSI_MODE_VIDEO)) { in mipi_dsi_stm32_attach()
243 return -ENOTSUP; in mipi_dsi_stm32_attach()
246 vcfg->VirtualChannelID = channel; in mipi_dsi_stm32_attach()
247 vcfg->ColorCoding = STM32_DSI_INIT_PIXEL_FORMAT; in mipi_dsi_stm32_attach()
249 if (mdev->mode_flags & MIPI_DSI_MODE_VIDEO_BURST) { in mipi_dsi_stm32_attach()
250 vcfg->Mode = DSI_VID_MODE_BURST; in mipi_dsi_stm32_attach()
251 } else if (mdev->mode_flags & MIPI_DSI_MODE_VIDEO_SYNC_PULSE) { in mipi_dsi_stm32_attach()
252 vcfg->Mode = DSI_VID_MODE_NB_PULSES; in mipi_dsi_stm32_attach()
254 vcfg->Mode = DSI_VID_MODE_NB_EVENTS; in mipi_dsi_stm32_attach()
257 vcfg->PacketSize = mdev->timings.hactive; in mipi_dsi_stm32_attach()
258 vcfg->NumberOfChunks = 0; in mipi_dsi_stm32_attach()
259 vcfg->NullPacketSize = 0xFFFU; in mipi_dsi_stm32_attach()
261 vcfg->HorizontalSyncActive = in mipi_dsi_stm32_attach()
262 (mdev->timings.hsync * data->lane_clk_khz) / data->pixel_clk_khz; in mipi_dsi_stm32_attach()
263 vcfg->HorizontalBackPorch = in mipi_dsi_stm32_attach()
264 (mdev->timings.hbp * data->lane_clk_khz) / data->pixel_clk_khz; in mipi_dsi_stm32_attach()
265 vcfg->HorizontalLine = in mipi_dsi_stm32_attach()
266 ((mdev->timings.hactive + mdev->timings.hsync + mdev->timings.hbp + in mipi_dsi_stm32_attach()
267 mdev->timings.hfp) * data->lane_clk_khz) / data->pixel_clk_khz; in mipi_dsi_stm32_attach()
268 vcfg->VerticalSyncActive = mdev->timings.vsync; in mipi_dsi_stm32_attach()
269 vcfg->VerticalBackPorch = mdev->timings.vbp; in mipi_dsi_stm32_attach()
270 vcfg->VerticalFrontPorch = mdev->timings.vfp; in mipi_dsi_stm32_attach()
271 vcfg->VerticalActive = mdev->timings.vactive; in mipi_dsi_stm32_attach()
273 if (mdev->mode_flags & MIPI_DSI_MODE_LPM) { in mipi_dsi_stm32_attach()
274 vcfg->LPCommandEnable = DSI_LP_COMMAND_ENABLE; in mipi_dsi_stm32_attach()
276 vcfg->LPCommandEnable = DSI_LP_COMMAND_DISABLE; in mipi_dsi_stm32_attach()
279 vcfg->LPHorizontalFrontPorchEnable = DSI_LP_HFP_ENABLE; in mipi_dsi_stm32_attach()
280 vcfg->LPHorizontalBackPorchEnable = DSI_LP_HBP_ENABLE; in mipi_dsi_stm32_attach()
281 vcfg->LPVerticalActiveEnable = DSI_LP_VACT_ENABLE; in mipi_dsi_stm32_attach()
282 vcfg->LPVerticalFrontPorchEnable = DSI_LP_VFP_ENABLE; in mipi_dsi_stm32_attach()
283 vcfg->LPVerticalBackPorchEnable = DSI_LP_VBP_ENABLE; in mipi_dsi_stm32_attach()
284 vcfg->LPVerticalSyncActiveEnable = DSI_LP_VSYNC_ENABLE; in mipi_dsi_stm32_attach()
286 ret = HAL_DSI_ConfigVideoMode(&data->hdsi, vcfg); in mipi_dsi_stm32_attach()
289 return -ret; in mipi_dsi_stm32_attach()
296 ret = HAL_DSI_Start(&data->hdsi); in mipi_dsi_stm32_attach()
299 return -ret; in mipi_dsi_stm32_attach()
302 if (config->test_pattern >= 0) { in mipi_dsi_stm32_attach()
303 ret = HAL_DSI_PatternGeneratorStart(&data->hdsi, 0, config->test_pattern); in mipi_dsi_stm32_attach()
306 return -ret; in mipi_dsi_stm32_attach()
316 struct mipi_dsi_stm32_data *data = dev->data; in mipi_dsi_stm32_transfer() local
322 switch (msg->type) { in mipi_dsi_stm32_transfer()
324 ret = HAL_DSI_Read(&data->hdsi, channel, (uint8_t *)msg->rx_buf, msg->rx_len, in mipi_dsi_stm32_transfer()
325 msg->type, msg->cmd, (uint8_t *)msg->rx_buf); in mipi_dsi_stm32_transfer()
326 len = msg->rx_len; in mipi_dsi_stm32_transfer()
330 param1 = msg->cmd; in mipi_dsi_stm32_transfer()
331 if (msg->tx_len >= 1U) { in mipi_dsi_stm32_transfer()
332 param2 = ((uint8_t *)msg->tx_buf)[0]; in mipi_dsi_stm32_transfer()
335 ret = HAL_DSI_ShortWrite(&data->hdsi, channel, msg->type, param1, param2); in mipi_dsi_stm32_transfer()
336 len = msg->tx_len; in mipi_dsi_stm32_transfer()
339 ret = HAL_DSI_LongWrite(&data->hdsi, channel, msg->type, msg->tx_len, msg->cmd, in mipi_dsi_stm32_transfer()
340 (uint8_t *)msg->tx_buf); in mipi_dsi_stm32_transfer()
341 len = msg->tx_len; in mipi_dsi_stm32_transfer()
346 param1 = ((uint8_t *)msg->tx_buf)[0]; in mipi_dsi_stm32_transfer()
347 if (msg->tx_len == 1U) { in mipi_dsi_stm32_transfer()
348 param2 = ((uint8_t *)msg->tx_buf)[1]; in mipi_dsi_stm32_transfer()
351 if (msg->tx_len >= 2U) { in mipi_dsi_stm32_transfer()
352 param2 = *(uint16_t *)&((uint8_t *)msg->tx_buf)[1]; in mipi_dsi_stm32_transfer()
355 ret = HAL_DSI_ShortWrite(&data->hdsi, channel, msg->type, param1, param2); in mipi_dsi_stm32_transfer()
356 len = msg->tx_len; in mipi_dsi_stm32_transfer()
359 ret = HAL_DSI_LongWrite(&data->hdsi, channel, msg->type, msg->tx_len, in mipi_dsi_stm32_transfer()
360 ((uint8_t *)msg->tx_buf)[0], &((uint8_t *)msg->tx_buf)[1]); in mipi_dsi_stm32_transfer()
361 len = msg->tx_len; in mipi_dsi_stm32_transfer()
364 LOG_ERR("Unsupported message type (%d)", msg->type); in mipi_dsi_stm32_transfer()
365 return -ENOTSUP; in mipi_dsi_stm32_transfer()
371 if (msg->type == MIPI_DSI_DCS_READ) { in mipi_dsi_stm32_transfer()
373 channel, msg->cmd, msg->rx_len); in mipi_dsi_stm32_transfer()
374 LOG_HEXDUMP_DBG(msg->rx_buf, msg->rx_len, tmp); in mipi_dsi_stm32_transfer()
377 channel, msg->cmd, msg->tx_len); in mipi_dsi_stm32_transfer()
378 LOG_HEXDUMP_DBG(msg->tx_buf, msg->tx_len, tmp); in mipi_dsi_stm32_transfer()
384 return -EIO; in mipi_dsi_stm32_transfer()
397 const struct mipi_dsi_stm32_config *config = dev->config; in mipi_dsi_stm32_init()
400 if (!device_is_ready(config->rcc)) { in mipi_dsi_stm32_init()
402 return -ENODEV; in mipi_dsi_stm32_init()
405 ret = clock_control_on(config->rcc, (clock_control_subsys_t)&config->dsi_clk); in mipi_dsi_stm32_init()
411 (void)reset_line_toggle_dt(&config->reset); in mipi_dsi_stm32_init()
448 /* Only child data-lanes property at index 0 is taken into account */ \
472 .test_pattern = DT_INST_PROP_OR(inst, test_pattern, -1), \