4  * SPDX-License-Identifier: Apache-2.0
71 	const struct memc_mspi_aps6404l_config *cfg = psram->config;  in memc_mspi_aps6404l_command_write()
72 	struct memc_mspi_aps6404l_data *data = psram->data;  in memc_mspi_aps6404l_command_write()
76 	data->packet.dir              = MSPI_TX;  in memc_mspi_aps6404l_command_write()
77 	data->packet.cmd              = cmd;  in memc_mspi_aps6404l_command_write()
78 	data->packet.address          = addr;  in memc_mspi_aps6404l_command_write()
79 	data->packet.data_buf         = buffer;  in memc_mspi_aps6404l_command_write()
80 	data->packet.num_bytes        = length;  in memc_mspi_aps6404l_command_write()
82 	data->trans.async             = false;  in memc_mspi_aps6404l_command_write()
83 	data->trans.xfer_mode         = MSPI_PIO;  in memc_mspi_aps6404l_command_write()
84 	data->trans.tx_dummy          = 0;  in memc_mspi_aps6404l_command_write()
85 	data->trans.cmd_length        = 1;  in memc_mspi_aps6404l_command_write()
86 	data->trans.addr_length       = 0;  in memc_mspi_aps6404l_command_write()
87 	data->trans.hold_ce           = false;  in memc_mspi_aps6404l_command_write()
88 	data->trans.packets           = &data->packet;  in memc_mspi_aps6404l_command_write()
89 	data->trans.num_packet        = 1;  in memc_mspi_aps6404l_command_write()
90 	data->trans.timeout           = 10;  in memc_mspi_aps6404l_command_write()
96 	ret = mspi_transceive(cfg->bus, &cfg->dev_id, (const struct mspi_xfer *)&data->trans);  in memc_mspi_aps6404l_command_write()
99 		return -EIO;  in memc_mspi_aps6404l_command_write()
107 	const struct memc_mspi_aps6404l_config *cfg = psram->config;  in memc_mspi_aps6404l_command_read()
108 	struct memc_mspi_aps6404l_data *data = psram->data;  in memc_mspi_aps6404l_command_read()
113 	data->packet.dir              = MSPI_RX;  in memc_mspi_aps6404l_command_read()
114 	data->packet.cmd              = cmd;  in memc_mspi_aps6404l_command_read()
115 	data->packet.address          = addr;  in memc_mspi_aps6404l_command_read()
116 	data->packet.data_buf         = buffer;  in memc_mspi_aps6404l_command_read()
117 	data->packet.num_bytes        = length;  in memc_mspi_aps6404l_command_read()
119 	data->trans.async             = false;  in memc_mspi_aps6404l_command_read()
120 	data->trans.xfer_mode         = MSPI_PIO;  in memc_mspi_aps6404l_command_read()
121 	data->trans.rx_dummy          = 0;  in memc_mspi_aps6404l_command_read()
122 	data->trans.cmd_length        = 1;  in memc_mspi_aps6404l_command_read()
123 	data->trans.addr_length       = 3;  in memc_mspi_aps6404l_command_read()
124 	data->trans.hold_ce           = false;  in memc_mspi_aps6404l_command_read()
125 	data->trans.packets           = &data->packet;  in memc_mspi_aps6404l_command_read()
126 	data->trans.num_packet        = 1;  in memc_mspi_aps6404l_command_read()
127 	data->trans.timeout           = 10;  in memc_mspi_aps6404l_command_read()
129 	ret = mspi_transceive(cfg->bus, &cfg->dev_id, (const struct mspi_xfer *)&data->trans);  in memc_mspi_aps6404l_command_read()
132 		return -EIO;  in memc_mspi_aps6404l_command_read()
141 	const struct memc_mspi_aps6404l_config *cfg = psram->config;  in acquire()
142 	struct memc_mspi_aps6404l_data *data = psram->data;  in acquire()
144 	k_sem_take(&data->lock, K_FOREVER);  in acquire()
146 	if (cfg->sw_multi_periph) {  in acquire()
147 		while (mspi_dev_config(cfg->bus, &cfg->dev_id,  in acquire()
148 				       MSPI_DEVICE_CONFIG_ALL, &data->dev_cfg)) {  in acquire()
152 		while (mspi_dev_config(cfg->bus, &cfg->dev_id,  in acquire()
162 	const struct memc_mspi_aps6404l_config *cfg = psram->config;  in release()
163 	struct memc_mspi_aps6404l_data *data = psram->data;  in release()
165 	while (mspi_get_channel_status(cfg->bus, cfg->port)) {  in release()
169 	k_sem_give(&data->lock);  in release()
222 	const struct memc_mspi_aps6404l_config *cfg = psram->config;  in memc_mspi_aps6404l_half_sleep_exit()
223 	struct memc_mspi_aps6404l_data *data = psram->data;  in memc_mspi_aps6404l_half_sleep_exit()
224 	struct mspi_dev_cfg bkp = data->dev_cfg;  in memc_mspi_aps6404l_half_sleep_exit()
227 	data->dev_cfg.freq = 48000000;  in memc_mspi_aps6404l_half_sleep_exit()
229 	mspi_dev_config(cfg->bus, &cfg->dev_id, MSPI_DEVICE_CONFIG_FREQUENCY,  in memc_mspi_aps6404l_half_sleep_exit()
230 			(const struct mspi_dev_cfg *)&data->dev_cfg);  in memc_mspi_aps6404l_half_sleep_exit()
238 	/** Minimum half sleep exit CE to CLK setup time  */  in memc_mspi_aps6404l_half_sleep_exit()
241 	data->dev_cfg = bkp;  in memc_mspi_aps6404l_half_sleep_exit()
243 	ret = mspi_dev_config(cfg->bus, &cfg->dev_id, MSPI_DEVICE_CONFIG_FREQUENCY,  in memc_mspi_aps6404l_half_sleep_exit()
244 			      (const struct mspi_dev_cfg *)&data->dev_cfg);  in memc_mspi_aps6404l_half_sleep_exit()
260 		break;  in memc_mspi_aps6404l_pm_action()
266 		break;  in memc_mspi_aps6404l_pm_action()
269 		return -ENOTSUP;  in memc_mspi_aps6404l_pm_action()
278 	const struct memc_mspi_aps6404l_config *cfg = psram->config;  in memc_mspi_aps6404l_init()
279 	struct memc_mspi_aps6404l_data *data = psram->data;  in memc_mspi_aps6404l_init()
282 	if (!device_is_ready(cfg->bus)) {  in memc_mspi_aps6404l_init()
284 		return -ENODEV;  in memc_mspi_aps6404l_init()
287 	switch (cfg->tar_dev_cfg.io_mode) {  in memc_mspi_aps6404l_init()
290 		break;  in memc_mspi_aps6404l_init()
292 		LOG_ERR("Bus mode %d not supported/%u", cfg->tar_dev_cfg.io_mode, __LINE__);  in memc_mspi_aps6404l_init()
293 		return -EIO;  in memc_mspi_aps6404l_init()
296 	if (data->dev_cfg.io_mode == MSPI_IO_MODE_QUAD) {  in memc_mspi_aps6404l_init()
297 		if (mspi_dev_config(cfg->bus, &cfg->dev_id, MSPI_DEVICE_CONFIG_ALL,  in memc_mspi_aps6404l_init()
298 				    &cfg->quad_cfg)) {  in memc_mspi_aps6404l_init()
299 			LOG_ERR("Failed to config mspi controller/%u", __LINE__);  in memc_mspi_aps6404l_init()
300 			return -EIO;  in memc_mspi_aps6404l_init()
302 		data->dev_cfg = cfg->quad_cfg;  in memc_mspi_aps6404l_init()
305 			return -EIO;  in memc_mspi_aps6404l_init()
309 			return -EIO;  in memc_mspi_aps6404l_init()
313 	if (mspi_dev_config(cfg->bus, &cfg->dev_id, MSPI_DEVICE_CONFIG_ALL, &cfg->serial_cfg)) {  in memc_mspi_aps6404l_init()
314 		LOG_ERR("Failed to config mspi controller/%u", __LINE__);  in memc_mspi_aps6404l_init()
315 		return -EIO;  in memc_mspi_aps6404l_init()
317 	data->dev_cfg = cfg->serial_cfg;  in memc_mspi_aps6404l_init()
321 		return -EIO;  in memc_mspi_aps6404l_init()
326 		return -EIO;  in memc_mspi_aps6404l_init()
334 	if (cfg->tar_dev_cfg.io_mode == MSPI_IO_MODE_QUAD) {  in memc_mspi_aps6404l_init()
336 			return -EIO;  in memc_mspi_aps6404l_init()
340 	if (mspi_dev_config(cfg->bus, &cfg->dev_id, MSPI_DEVICE_CONFIG_ALL, &cfg->tar_dev_cfg)) {  in memc_mspi_aps6404l_init()
341 		LOG_ERR("Failed to config mspi controller/%u", __LINE__);  in memc_mspi_aps6404l_init()
342 		return -EIO;  in memc_mspi_aps6404l_init()
344 	data->dev_cfg = cfg->tar_dev_cfg;  in memc_mspi_aps6404l_init()
347 	if (mspi_timing_config(cfg->bus, &cfg->dev_id, cfg->timing_cfg_mask,  in memc_mspi_aps6404l_init()
348 			       (void *)&cfg->tar_timing_cfg)) {  in memc_mspi_aps6404l_init()
349 		LOG_ERR("Failed to config mspi timing/%u", __LINE__);  in memc_mspi_aps6404l_init()
350 		return -EIO;  in memc_mspi_aps6404l_init()
352 	data->timing_cfg = cfg->tar_timing_cfg;  in memc_mspi_aps6404l_init()
356 	if (cfg->tar_xip_cfg.enable) {  in memc_mspi_aps6404l_init()
357 		if (mspi_xip_config(cfg->bus, &cfg->dev_id, &cfg->tar_xip_cfg)) {  in memc_mspi_aps6404l_init()
359 			return -EIO;  in memc_mspi_aps6404l_init()
361 		data->xip_cfg = cfg->tar_xip_cfg;  in memc_mspi_aps6404l_init()
366 	if (cfg->tar_scramble_cfg.enable) {  in memc_mspi_aps6404l_init()
367 		if (mspi_scramble_config(cfg->bus, &cfg->dev_id, &cfg->tar_scramble_cfg)) {  in memc_mspi_aps6404l_init()
369 			return -EIO;  in memc_mspi_aps6404l_init()
371 		data->scramble_cfg = cfg->tar_scramble_cfg;  in memc_mspi_aps6404l_init()