2  * Copyright 2020-2023 NXP
4  * SPDX-License-Identifier: Apache-2.0
22  * at runtime, so that the chip does not access the flexspi to read program
27 	read-while-write hazards. This configuration is not recommended."
47 /* flexspi device data should be stored in RAM to avoid read-while-write hazards */
75 	struct memc_flexspi_data *data = dev->data;  in memc_flexspi_wait_bus_idle()
77 	while (false == FLEXSPI_GetBusIdleStatus(data->base)) {  in memc_flexspi_wait_bus_idle()
83 	struct memc_flexspi_data *data = dev->data;  in memc_flexspi_is_running_xip()
85 	return data->xip;  in memc_flexspi_is_running_xip()
92 	struct memc_flexspi_data *data = dev->data;  in memc_flexspi_update_clock()
98 	 * - disable the module  in memc_flexspi_update_clock()
99 	 * - set the new clock  in memc_flexspi_update_clock()
100 	 * - reenable the module  in memc_flexspi_update_clock()
101 	 * - reset the module  in memc_flexspi_update_clock()
107 	ret = clock_control_set_rate(data->clock_dev, data->clock_subsys,  in memc_flexspi_update_clock()
120 	device_config->flexspiRootClk = freq_hz;  in memc_flexspi_update_clock()
121 	FLEXSPI_UpdateDllValue(data->base, device_config, port);  in memc_flexspi_update_clock()
125 	ret = clock_control_get_rate(data->clock_dev, data->clock_subsys, &rate);  in memc_flexspi_update_clock()
132 	device_config->flexspiRootClk = rate;  in memc_flexspi_update_clock()
133 	FLEXSPI_UpdateDllValue(data->base, device_config, port);  in memc_flexspi_update_clock()
150 	struct memc_flexspi_data *data = dev->data;  in memc_flexspi_set_device_config()
156 		LOG_ERR("Invalid port number");  in memc_flexspi_set_device_config()
157 		return -EINVAL;  in memc_flexspi_set_device_config()
160 	if (data->port_luts[port].lut_used < lut_count) {  in memc_flexspi_set_device_config()
165 			lut_used += data->port_luts[i].lut_used;  in memc_flexspi_set_device_config()
169 			return -ENOBUFS;  in memc_flexspi_set_device_config()
173 	data->size[port] = device_config->flashSize * KB(1);  in memc_flexspi_set_device_config()
176 		/* We need to avoid flash access while configuring the FlexSPI.  in memc_flexspi_set_device_config()
177 		 * To do this, we will copy the LUT array into stack-allocated  in memc_flexspi_set_device_config()
185 	/* Update FlexSPI AWRSEQID and ARDSEQID values based on where the LUT  in memc_flexspi_set_device_config()
188 	if (data->port_luts[port].lut_used < lut_count) {  in memc_flexspi_set_device_config()
190 		data->port_luts[port].lut_offset = lut_used;  in memc_flexspi_set_device_config()
192 	/* LUTs should only be installed on sequence boundaries, every  in memc_flexspi_set_device_config()
195 	data->port_luts[port].lut_used = ROUND_UP(lut_count, 4);  in memc_flexspi_set_device_config()
196 	tmp_config.ARDSeqIndex += data->port_luts[port].lut_offset / MEMC_FLEXSPI_CMD_PER_SEQ;  in memc_flexspi_set_device_config()
197 	tmp_config.AWRSeqIndex += data->port_luts[port].lut_offset / MEMC_FLEXSPI_CMD_PER_SEQ;  in memc_flexspi_set_device_config()
202 	FLEXSPI_SetFlashConfig(data->base, &tmp_config, port);  in memc_flexspi_set_device_config()
203 	FLEXSPI_UpdateLUT(data->base, data->port_luts[port].lut_offset,  in memc_flexspi_set_device_config()
212 	struct memc_flexspi_data *data = dev->data;  in memc_flexspi_reset()
214 	FLEXSPI_SoftwareReset(data->base);  in memc_flexspi_reset()
223 	struct memc_flexspi_data *data = dev->data;  in memc_flexspi_transfer()
228 	/* Calculate sequence offset and address offset based on port */  in memc_flexspi_transfer()
229 	seq_off = data->port_luts[transfer->port].lut_offset /  in memc_flexspi_transfer()
231 	for (i = 0; i < transfer->port; i++) {  in memc_flexspi_transfer()
232 		addr_offset += data->size[i];  in memc_flexspi_transfer()
240 		status = FLEXSPI_TransferBlocking(data->base, &tmp);  in memc_flexspi_transfer()
243 		status = FLEXSPI_TransferBlocking(data->base, transfer);  in memc_flexspi_transfer()
248 		return -EIO;  in memc_flexspi_transfer()
257 	struct memc_flexspi_data *data = dev->data;  in memc_flexspi_get_ahb_address()
261 		LOG_ERR("Invalid port number: %u", port);  in memc_flexspi_get_ahb_address()
266 		offset += data->size[i];  in memc_flexspi_get_ahb_address()
269 	return data->ahb_base + offset;  in memc_flexspi_get_ahb_address()
274 	struct memc_flexspi_data *data = dev->data;  in memc_flexspi_init()
280 	/* we should not configure the device we are running on */  in memc_flexspi_init()
283 			LOG_DBG("XIP active on %s, skipping init", dev->name);  in memc_flexspi_init()
291 	ret = pinctrl_apply_state(data->pincfg, PINCTRL_STATE_DEFAULT);  in memc_flexspi_init()
292 	if (ret < 0 && ret != -ENOENT) {  in memc_flexspi_init()
298 	flexspi_config.ahbConfig.enableAHBBufferable = data->ahb_bufferable;  in memc_flexspi_init()
299 	flexspi_config.ahbConfig.enableAHBCachable = data->ahb_cacheable;  in memc_flexspi_init()
300 	flexspi_config.ahbConfig.enableAHBPrefetch = data->ahb_prefetch;  in memc_flexspi_init()
301 	flexspi_config.ahbConfig.enableReadAddressOpt = data->ahb_read_addr_opt;  in memc_flexspi_init()
304 	flexspi_config.enableCombination = data->combination_mode;  in memc_flexspi_init()
309 	flexspi_config.enableSckBDiffOpt = data->sck_differential_clock;  in memc_flexspi_init()
311 	flexspi_config.rxSampleClock = data->rx_sample_clock;  in memc_flexspi_init()
314 	flexspi_config.rxSampleClockPortB = data->rx_sample_clock_b;  in memc_flexspi_init()
324 	__ASSERT(data->buf_cfg_cnt < FSL_FEATURE_FLEXSPI_AHB_BUFFER_COUNT,  in memc_flexspi_init()
326 	for (i = 0; i < data->buf_cfg_cnt; i++) {  in memc_flexspi_init()
328 		flexspi_config.ahbConfig.buffer[i].enablePrefetch = data->buf_cfg[i].prefetch;  in memc_flexspi_init()
329 		/* AHB access priority (used for suspending control of AHB prefetching )*/  in memc_flexspi_init()
330 		flexspi_config.ahbConfig.buffer[i].priority = data->buf_cfg[i].priority;  in memc_flexspi_init()
332 		flexspi_config.ahbConfig.buffer[i].masterIndex = data->buf_cfg[i].master_id;  in memc_flexspi_init()
334 		flexspi_config.ahbConfig.buffer[i].bufferSize = data->buf_cfg[i].buf_size;  in memc_flexspi_init()
338 		/* Save flash sizes- FlexSPI init will reset them */  in memc_flexspi_init()
340 			flash_sizes[i] = data->base->FLSHCR0[i];  in memc_flexspi_init()
344 	FLEXSPI_Init(data->base, &flexspi_config);  in memc_flexspi_init()
348 	data->base->AHBCR = (data->base->AHBCR & ~FLEXSPI_AHBCR_ALIGNMENT_MASK) |  in memc_flexspi_init()
349 		FLEXSPI_AHBCR_ALIGNMENT(data->ahb_boundary);  in memc_flexspi_init()
355 			data->base->FLSHCR0[i] = flash_sizes[i];  in memc_flexspi_init()
359 		data->base->MCR0 &= ~FLEXSPI_MCR0_MDIS_MASK;  in memc_flexspi_init()
368 	struct memc_flexspi_data *data = dev->data;  in memc_flexspi_pm_action()
373 		ret = pinctrl_apply_state(data->pincfg, PINCTRL_STATE_DEFAULT);  in memc_flexspi_pm_action()
374 		if (ret < 0 && ret != -ENOENT) {  in memc_flexspi_pm_action()
379 		ret = pinctrl_apply_state(data->pincfg, PINCTRL_STATE_SLEEP);  in memc_flexspi_pm_action()
380 		if (ret < 0 && ret != -ENOENT) {  in memc_flexspi_pm_action()
385 		return -ENOTSUP;  in memc_flexspi_pm_action()