4  * SPDX-License-Identifier: Apache-2.0
24 	 ((const struct stm32_ipcc_mailbox_config * const)(dev)->config)->uconf.base)
53 #define IPCC_ReadReg(hipcc, reg) READ_REG(hipcc->C1##reg)
55 #define IPCC_ReadReg_SR(hipcc) READ_REG(hipcc->C1TOC2SR)
56 #define IPCC_ReadOtherInstReg_SR(hipcc) READ_REG(hipcc->C2TOC1SR)
81 #define IPCC_ReadReg(hipcc, reg) READ_REG(hipcc->C2##reg)
83 #define IPCC_ReadReg_SR(hipcc) READ_REG(hipcc->C2TOC1SR)
84 #define IPCC_ReadOtherInstReg_SR(hipcc) READ_REG(hipcc->C1TOC2SR)
104 	struct stm32_ipcc_mbx_data *data = dev->data;  in stm32_ipcc_mailbox_rx_isr()
105 	const struct stm32_ipcc_mailbox_config *cfg = dev->config;  in stm32_ipcc_mailbox_rx_isr()
107 	uint32_t mask, i;  in stm32_ipcc_mailbox_rx_isr()  local
109 	mask = (~IPCC_ReadReg(cfg->ipcc, MR)) & IPCC_ALL_MR_RXO_CH_MASK;  in stm32_ipcc_mailbox_rx_isr()
110 	mask &= IPCC_ReadOtherInstReg_SR(cfg->ipcc) & IPCC_ALL_SR_CH_MASK;  in stm32_ipcc_mailbox_rx_isr()
112 	for (i = 0; i < data->num_ch; i++) {  in stm32_ipcc_mailbox_rx_isr()
113 		if (!((1 << i) & mask)) {  in stm32_ipcc_mailbox_rx_isr()
117 		/* mask the channel Free interrupt  */  in stm32_ipcc_mailbox_rx_isr()
118 		IPCC_DisableReceiveChannel(cfg->ipcc, i);  in stm32_ipcc_mailbox_rx_isr()
120 		if (data->callback) {  in stm32_ipcc_mailbox_rx_isr()
122 			data->callback(dev, data->user_data, i, &value);  in stm32_ipcc_mailbox_rx_isr()
125 		IPCC_ClearFlag_CHx(cfg->ipcc, i);  in stm32_ipcc_mailbox_rx_isr()
126 		IPCC_EnableReceiveChannel(cfg->ipcc, i);  in stm32_ipcc_mailbox_rx_isr()
132 	struct stm32_ipcc_mbx_data *data = dev->data;  in stm32_ipcc_mailbox_tx_isr()
133 	const struct stm32_ipcc_mailbox_config *cfg = dev->config;  in stm32_ipcc_mailbox_tx_isr()
134 	uint32_t mask, i;  in stm32_ipcc_mailbox_tx_isr()  local
136 	mask = (~IPCC_ReadReg(cfg->ipcc, MR)) & IPCC_ALL_MR_TXF_CH_MASK;  in stm32_ipcc_mailbox_tx_isr()
137 	mask = mask >> IPCC_C1MR_CH1FM_Pos;  in stm32_ipcc_mailbox_tx_isr()
139 	mask &= ~IPCC_ReadReg_SR(cfg->ipcc) & IPCC_ALL_SR_CH_MASK;  in stm32_ipcc_mailbox_tx_isr()
141 	for (i = 0; i <  data->num_ch; i++) {  in stm32_ipcc_mailbox_tx_isr()
142 		if (!((1 << i) & mask)) {  in stm32_ipcc_mailbox_tx_isr()
146 		/* mask the channel Free interrupt */  in stm32_ipcc_mailbox_tx_isr()
147 		IPCC_DisableTransmitChannel(cfg->ipcc, i);  in stm32_ipcc_mailbox_tx_isr()
155 	struct stm32_ipcc_mbx_data *data = dev->data;  in stm32_ipcc_mailbox_ipm_send()
156 	const struct stm32_ipcc_mailbox_config *cfg = dev->config;  in stm32_ipcc_mailbox_ipm_send()
163 		return -EMSGSIZE;  in stm32_ipcc_mailbox_ipm_send()
166 	if (id >= data->num_ch) {  in stm32_ipcc_mailbox_ipm_send()
168 		return  -EINVAL;  in stm32_ipcc_mailbox_ipm_send()
174 	if (IPCC_IsActiveFlag_CHx(cfg->ipcc, id)) {  in stm32_ipcc_mailbox_ipm_send()
176 		while (IPCC_IsActiveFlag_CHx(cfg->ipcc, id)) {  in stm32_ipcc_mailbox_ipm_send()
180 	IPCC_EnableTransmitChannel(cfg->ipcc, id);  in stm32_ipcc_mailbox_ipm_send()
181 	IPCC_SetFlag_CHx(cfg->ipcc, id);  in stm32_ipcc_mailbox_ipm_send()
196 	struct stm32_ipcc_mbx_data *data = d->data;  in stm32_ipcc_mailbox_ipm_max_id_val_get()
198 	return data->num_ch - 1;  in stm32_ipcc_mailbox_ipm_max_id_val_get()
205 	struct stm32_ipcc_mbx_data *data = d->data;  in stm32_ipcc_mailbox_ipm_register_callback()
207 	data->callback = cb;  in stm32_ipcc_mailbox_ipm_register_callback()
208 	data->user_data = user_data;  in stm32_ipcc_mailbox_ipm_register_callback()
214 	struct stm32_ipcc_mbx_data *data = dev->data;  in stm32_ipcc_mailbox_ipm_set_enabled()
215 	const struct stm32_ipcc_mailbox_config *cfg = dev->config;  in stm32_ipcc_mailbox_ipm_set_enabled()
221 		/* Enable RX and TX interrupts */  in stm32_ipcc_mailbox_ipm_set_enabled()
222 		IPCC_EnableIT_TXF(cfg->ipcc);  in stm32_ipcc_mailbox_ipm_set_enabled()
223 		IPCC_EnableIT_RXO(cfg->ipcc);  in stm32_ipcc_mailbox_ipm_set_enabled()
224 		for (i = 0; i < data->num_ch; i++) {  in stm32_ipcc_mailbox_ipm_set_enabled()
225 			IPCC_EnableReceiveChannel(cfg->ipcc, i);  in stm32_ipcc_mailbox_ipm_set_enabled()
228 		/* Disable RX and TX interrupts */  in stm32_ipcc_mailbox_ipm_set_enabled()
229 		IPCC_DisableIT_TXF(cfg->ipcc);  in stm32_ipcc_mailbox_ipm_set_enabled()
230 		IPCC_DisableIT_RXO(cfg->ipcc);  in stm32_ipcc_mailbox_ipm_set_enabled()
231 		for (i = 0; i < data->num_ch; i++) {  in stm32_ipcc_mailbox_ipm_set_enabled()
232 			IPCC_DisableReceiveChannel(cfg->ipcc, i);  in stm32_ipcc_mailbox_ipm_set_enabled()
242 	struct stm32_ipcc_mbx_data *data = dev->data;  in stm32_ipcc_mailbox_init()
243 	const struct stm32_ipcc_mailbox_config *cfg = dev->config;  in stm32_ipcc_mailbox_init()
251 		return -ENODEV;  in stm32_ipcc_mailbox_init()
256 			     (clock_control_subsys_t)&cfg->pclken) != 0) {  in stm32_ipcc_mailbox_init()
257 		return -EIO;  in stm32_ipcc_mailbox_init()
260 	/* Disable RX and TX interrupts */  in stm32_ipcc_mailbox_init()
261 	IPCC_DisableIT_TXF(cfg->ipcc);  in stm32_ipcc_mailbox_init()
262 	IPCC_DisableIT_RXO(cfg->ipcc);  in stm32_ipcc_mailbox_init()
264 	data->num_ch = LL_IPCC_GetChannelConfig(cfg->ipcc);  in stm32_ipcc_mailbox_init()
266 	for (i = 0; i < data->num_ch; i++) {  in stm32_ipcc_mailbox_init()
268 		IPCC_ClearFlag_CHx(cfg->ipcc, i);  in stm32_ipcc_mailbox_init()
269 		/* mask RX and TX interrupts */  in stm32_ipcc_mailbox_init()
270 		IPCC_DisableReceiveChannel(cfg->ipcc, i);  in stm32_ipcc_mailbox_init()
271 		IPCC_DisableTransmitChannel(cfg->ipcc, i);  in stm32_ipcc_mailbox_init()
274 	cfg->irq_config_func(dev);  in stm32_ipcc_mailbox_init()