Lines Matching +full:0 +full:x40
17 #define WKPU_NSR 0x0
19 #define WKPU_NCR 0x8
21 #define WKPU_WISR(n) (0x14 + 0x40 * (n))
23 #define WKPU_IRER(n) (0x18 + 0x40 * (n))
25 #define WKPU_WRER(n) (0x1c + 0x40 * (n))
27 #define WKPU_WIREER(n) (0x28 + 0x40 * (n))
29 #define WKPU_WIFEER(n) (0x2c + 0x40 * (n))
31 #define WKPU_WIFER(n) (0x30 + 0x40 * (n))
83 return 0; in wkpu_nxp_s32_set_callback()
94 return 0; in wkpu_nxp_s32_set_callback()
104 data->cb[irq].pin = 0; in wkpu_nxp_s32_unset_callback()
162 flags = REG_READ(WKPU_WISR(0U)) & REG_READ(WKPU_IRER(0U)); in wkpu_nxp_s32_get_pending()
175 REG_WRITE(WKPU_WIREER(0U), 0U); in wkpu_nxp_s32_init()
176 REG_WRITE(WKPU_WIFEER(0U), 0U); in wkpu_nxp_s32_init()
177 REG_WRITE(WKPU_WISR(0U), 0xffffffff); in wkpu_nxp_s32_init()
178 REG_WRITE(WKPU_IRER(0U), 0U); in wkpu_nxp_s32_init()
181 REG_WRITE(WKPU_WIFER(0U), (uint32_t)config->filter_enable); in wkpu_nxp_s32_init()
184 REG_WRITE(WKPU_WIREER(1U), 0U); in wkpu_nxp_s32_init()
185 REG_WRITE(WKPU_WIFEER(1U), 0U); in wkpu_nxp_s32_init()
186 REG_WRITE(WKPU_WISR(1U), 0xffffffff); in wkpu_nxp_s32_init()
187 REG_WRITE(WKPU_IRER(1U), 0U); in wkpu_nxp_s32_init()
191 return 0; in wkpu_nxp_s32_init()
195 COND_CODE_1(DT_PROP(DT_INST_CHILD(n, irq_##idx), filter_enable), (BIT(idx)), (0U))
218 COND_CODE_1(CONFIG_GIC, (DT_INST_IRQ(n, flags)), (0U))); \
221 return 0; \