4  * SPDX-License-Identifier: Apache-2.0
16 	uint8_t pin : 5;  member
34 	while (EIC->SYNCBUSY.reg) {  in wait_synchronization()
37 	while (EIC->STATUS.bit.SYNCBUSY) {  in wait_synchronization()
45 	EIC->CTRLA.bit.ENABLE = on;  in set_eic_enable()
47 	EIC->CTRL.bit.ENABLE = on;  in set_eic_enable()
53 	struct sam0_eic_data *const dev_data = dev->data;  in sam0_eic_isr()
54 	uint16_t bits = EIC->INTFLAG.reg;  in sam0_eic_isr()
58 	EIC->INTFLAG.reg = bits;  in sam0_eic_isr()
74 	 * Map the EIC lines to the port pin masks based on which port is  in sam0_eic_isr()
88 			&dev_data->lines[line_index];  in sam0_eic_isr()
90 			&dev_data->ports[line_assignment->port];  in sam0_eic_isr()
92 		port_data->cb(BIT(line_assignment->pin), port_data->data);  in sam0_eic_isr()
96 int sam0_eic_acquire(int port, int pin, enum sam0_eic_trigger trigger,  in sam0_eic_acquire()  argument
100 	struct sam0_eic_data *dev_data = dev->data;  in sam0_eic_acquire()
104 	int line_index;  in sam0_eic_acquire()
105 	int config_index;  in sam0_eic_acquire()
106 	int config_shift;  in sam0_eic_acquire()
107 	unsigned int key;  in sam0_eic_acquire()
110 	line_index = sam0_eic_map_to_line(port, pin);  in sam0_eic_acquire()
124 	line_assignment = &dev_data->lines[line_index];  in sam0_eic_acquire()
127 	if (line_assignment->enabled) {  in sam0_eic_acquire()
128 		if (line_assignment->port != port ||  in sam0_eic_acquire()
129 		    line_assignment->pin != pin) {  in sam0_eic_acquire()
135 	port_data = &dev_data->ports[port];  in sam0_eic_acquire()
136 	port_data->cb = cb;  in sam0_eic_acquire()
137 	port_data->data = data;  in sam0_eic_acquire()
138 	line_assignment->pin = pin;  in sam0_eic_acquire()
139 	line_assignment->port = port;  in sam0_eic_acquire()
140 	line_assignment->enabled = 1;  in sam0_eic_acquire()
142 	config = EIC->CONFIG[config_index].reg;  in sam0_eic_acquire()
167 	EIC->CONFIG[config_index].reg = config;  in sam0_eic_acquire()
173 	 * enabled pin after being enabled, so clear it before re-enabling  in sam0_eic_acquire()
176 	EIC->INTFLAG.reg = mask;  in sam0_eic_acquire()
184 	return -EBUSY;  in sam0_eic_acquire()
187 static bool sam0_eic_check_ownership(int port, int pin, int line_index)  in sam0_eic_check_ownership()  argument
190 	struct sam0_eic_data *dev_data = dev->data;  in sam0_eic_check_ownership()
192 		&dev_data->lines[line_index];  in sam0_eic_check_ownership()
194 	if (!line_assignment->enabled) {  in sam0_eic_check_ownership()
198 	if (line_assignment->port != port ||  in sam0_eic_check_ownership()
199 	    line_assignment->pin != pin) {  in sam0_eic_check_ownership()
206 int sam0_eic_release(int port, int pin)  in sam0_eic_release()  argument
209 	struct sam0_eic_data *dev_data = dev->data;  in sam0_eic_release()
211 	int line_index;  in sam0_eic_release()
212 	int config_index;  in sam0_eic_release()
213 	int config_shift;  in sam0_eic_release()
214 	unsigned int key;  in sam0_eic_release()
216 	line_index = sam0_eic_map_to_line(port, pin);  in sam0_eic_release()
235 	if (!sam0_eic_check_ownership(port, pin, line_index)) {  in sam0_eic_release()
239 	dev_data->lines[line_index].enabled = 0;  in sam0_eic_release()
242 	EIC->CONFIG[config_index].reg &= ~(0xF << config_shift);  in sam0_eic_release()
245 	EIC->INTENCLR.reg = mask;  in sam0_eic_release()
246 	EIC->INTFLAG.reg = mask;  in sam0_eic_release()
255 int sam0_eic_enable_interrupt(int port, int pin)  in sam0_eic_enable_interrupt()  argument
258 	int line_index;  in sam0_eic_enable_interrupt()
260 	line_index = sam0_eic_map_to_line(port, pin);  in sam0_eic_enable_interrupt()
265 	if (!sam0_eic_check_ownership(port, pin, line_index)) {  in sam0_eic_enable_interrupt()
266 		return -EBUSY;  in sam0_eic_enable_interrupt()
270 	EIC->INTFLAG.reg = mask;  in sam0_eic_enable_interrupt()
271 	EIC->INTENSET.reg = mask;  in sam0_eic_enable_interrupt()
276 int sam0_eic_disable_interrupt(int port, int pin)  in sam0_eic_disable_interrupt()  argument
279 	int line_index;  in sam0_eic_disable_interrupt()
281 	line_index = sam0_eic_map_to_line(port, pin);  in sam0_eic_disable_interrupt()
286 	if (!sam0_eic_check_ownership(port, pin, line_index)) {  in sam0_eic_disable_interrupt()
287 		return -EBUSY;  in sam0_eic_disable_interrupt()
291 	EIC->INTENCLR.reg = mask;  in sam0_eic_disable_interrupt()
292 	EIC->INTFLAG.reg = mask;  in sam0_eic_disable_interrupt()
297 uint32_t sam0_eic_interrupt_pending(int port)  in sam0_eic_interrupt_pending()
300 	struct sam0_eic_data *dev_data = dev->data;  in sam0_eic_interrupt_pending()
302 	uint32_t set = EIC->INTFLAG.reg;  in sam0_eic_interrupt_pending()
305 	for (int line_index = 0; line_index < EIC_EXTINT_NUM; line_index++) {  in sam0_eic_interrupt_pending()
306 		line_assignment = &dev_data->lines[line_index];  in sam0_eic_interrupt_pending()
308 		if (!line_assignment->enabled) {  in sam0_eic_interrupt_pending()
312 		if (line_assignment->port != port) {  in sam0_eic_interrupt_pending()
320 		mask |= BIT(line_assignment->pin);  in sam0_eic_interrupt_pending()
335 static int sam0_eic_init(const struct device *dev)  in sam0_eic_init()
341 	MCLK->APBAMASK.reg |= MCLK_APBAMASK_EIC;  in sam0_eic_init()
344 	GCLK->PCHCTRL[EIC_GCLK_ID].reg = GCLK_PCHCTRL_GEN_GCLK0 |  in sam0_eic_init()
348 	PM->APBAMASK.bit.EIC_ = 1;  in sam0_eic_init()
351 	GCLK->CLKCTRL.reg = GCLK_CLKCTRL_ID_EIC | GCLK_CLKCTRL_GEN_GCLK0 |  in sam0_eic_init()