26  *  2. npcxn-miwus-int-map.dtsi: it presents relationship between MIWU group
28  *     For example, here is the mapping between miwu0's group a & d and IRQ7:
41  *     0x09, the driver checks the pending bits of group a and group d in ISR.
83 	/* Callback functions list for each MIWU group */
129 static void npcx_miwu_set_pseudo_both_edge(uint8_t table, uint8_t group, uint8_t bit)  in npcx_miwu_set_pseudo_both_edge()  argument
135 	if (IS_BIT_SET(NPCX_WKST(base, group), bit)) {  in npcx_miwu_set_pseudo_both_edge()
137 		NPCX_WKEDG(base, group) |= pmask;  in npcx_miwu_set_pseudo_both_edge()
140 		NPCX_WKEDG(base, group) &= ~pmask;  in npcx_miwu_set_pseudo_both_edge()
190 	NPCX_WKEN(base, wui->group) |= BIT(wui->bit);  in npcx_miwu_irq_enable()
193 	if ((data->both_edge_pins[wui->group] & BIT(wui->bit)) != 0) {  in npcx_miwu_irq_enable()
194 		npcx_miwu_set_pseudo_both_edge(wui->table, wui->group, wui->bit);  in npcx_miwu_irq_enable()
205 	NPCX_WKEN(base, wui->group) &= ~BIT(wui->bit);  in npcx_miwu_irq_disable()
213 	NPCX_WKINEN(base, wui->group) |= BIT(wui->bit);  in npcx_miwu_io_enable()
221 	NPCX_WKINEN(base, wui->group) &= ~BIT(wui->bit);  in npcx_miwu_io_disable()
229 	return IS_BIT_SET(NPCX_WKEN(base, wui->group), wui->bit);  in npcx_miwu_irq_get_state()
241 	bool pending = IS_BIT_SET(NPCX_WKPND(base, wui->group), wui->bit);  in npcx_miwu_irq_get_and_clear_pending()
247 		NPCX_WKPCL(base, wui->group) = BIT(wui->bit);  in npcx_miwu_irq_get_and_clear_pending()
249 		if ((data->both_edge_pins[wui->group] & BIT(wui->bit)) != 0) {  in npcx_miwu_irq_get_and_clear_pending()
250 			npcx_miwu_set_pseudo_both_edge(wui->table, wui->group, wui->bit);  in npcx_miwu_irq_get_and_clear_pending()
254 		NPCX_WKPCL(base, wui->group) = BIT(wui->bit);  in npcx_miwu_irq_get_and_clear_pending()
278 	data->both_edge_pins[wui->group] &= ~BIT(wui->bit);  in npcx_miwu_interrupt_configure()
283 		NPCX_WKMOD(base, wui->group) |= pmask;  in npcx_miwu_interrupt_configure()
287 			NPCX_WKEDG(base, wui->group) &= ~pmask;  in npcx_miwu_interrupt_configure()
291 			NPCX_WKEDG(base, wui->group) |= pmask;  in npcx_miwu_interrupt_configure()
300 		NPCX_WKMOD(base, wui->group) &= ~pmask;  in npcx_miwu_interrupt_configure()
304 			NPCX_WKAEDG(base, wui->group) &= ~pmask;  in npcx_miwu_interrupt_configure()
305 			NPCX_WKEDG(base, wui->group) |= pmask;  in npcx_miwu_interrupt_configure()
309 			NPCX_WKAEDG(base, wui->group) &= ~pmask;  in npcx_miwu_interrupt_configure()
310 			NPCX_WKEDG(base, wui->group) &= ~pmask;  in npcx_miwu_interrupt_configure()
315 			NPCX_WKAEDG(base, wui->group) &= ~pmask;  in npcx_miwu_interrupt_configure()
316 			data->both_edge_pins[wui->group] |= BIT(wui->bit);  in npcx_miwu_interrupt_configure()
319 			NPCX_WKAEDG(base, wui->group) |= pmask;  in npcx_miwu_interrupt_configure()
329 	NPCX_WKINEN(base, wui->group) |= pmask;  in npcx_miwu_interrupt_configure()
335 	NPCX_WKPCL(base, wui->group) |= pmask;  in npcx_miwu_interrupt_configure()
338 	if ((data->both_edge_pins[wui->group] & BIT(wui->bit)) != 0) {  in npcx_miwu_interrupt_configure()
339 		npcx_miwu_set_pseudo_both_edge(wui->table, wui->group, wui->bit);  in npcx_miwu_interrupt_configure()
358 	callback->io_cb.params.wui.group = io_wui->group;  in npcx_miwu_init_gpio_callback()
368 	callback->dev_cb.params.wui.group = dev_wui->group;  in npcx_miwu_init_dev_callback()
388 	cb_list = &data->cb_list_grp[wui->group];  in npcx_miwu_manage_callback()
415 		int group = 0;                                                 \
420 				intc_miwu_isr_pri(inst, group);                \
421 			group++;                                               \
441 		/* Config IRQ and MWIU group directly */                       \