4  * SPDX-License-Identifier: Apache-2.0
80 	_ier = *reg_enable[IT8XXX2_IER_COUNT - 1];  in ite_intc_save_and_disable_interrupts()
125 	/* critical section due to run a bit-wise OR operation */  in ite_intc_irq_enable()
144 	/* critical section due to run a bit-wise OR operation */  in ite_intc_irq_disable()
158 	volatile uint8_t *tri;  in ite_intc_irq_polarity_set()  local
165 	tri = reg_ipolr[g];  in ite_intc_irq_polarity_set()
167 		CLEAR_MASK(*tri, BIT(i));  in ite_intc_irq_polarity_set()
169 		SET_MASK(*tri, BIT(i));  in ite_intc_irq_polarity_set()
171 	tri = reg_ielmr[g];  in ite_intc_irq_polarity_set()
173 		CLEAR_MASK(*tri, BIT(i));  in ite_intc_irq_polarity_set()
175 		SET_MASK(*tri, BIT(i));  in ite_intc_irq_polarity_set()
218 	intc_irq -= IVECT_OFFSET_WITH_IRQ;  in get_irq()
226 		for (int i = (IT8XXX2_IER_COUNT - 1); i >= 0; i--) {  in get_irq()
230 						find_msb_set(int_pending) - 1;  in get_irq()
256 	if (gctrl_regs->GCTRL_DBGROS & IT8XXX2_GCTRL_SMB_DBGR) {  in soc_interrupt_init()
260 		wdt_regs->ETWCFG = 0;  in soc_interrupt_init()
261 		wdt_regs->ET1PSR = IT8XXX2_WDT_ETPS_1P024_KHZ;  in soc_interrupt_init()
262 		wdt_regs->ETWCFG = (IT8XXX2_WDT_EWDKEYEN | IT8XXX2_WDT_EWDSRC);  in soc_interrupt_init()
264 		gctrl_regs->GCTRL_ETWDUARTCR |= IT8XXX2_GCTRL_ETWD_HW_RST_EN;  in soc_interrupt_init()
266 		wdt_regs->EWDKEYR = 0;  in soc_interrupt_init()
273 		gctrl_regs->GCTRL_ETWDUARTCR &= ~IT8XXX2_GCTRL_ETWD_HW_RST_EN;  in soc_interrupt_init()
277 	/* Ensure interrupts of soc are disabled at default */  in soc_interrupt_init()
282 	/* Enable M-mode external interrupt */  in soc_interrupt_init()