Lines Matching +full:io +full:- +full:low +full:- +full:port

2  * Copyright (c) 1997-1998, 2000-2002, 2004, 2006-2008, 2011-2015 Wind River
5 * SPDX-License-Identifier: Apache-2.0
12 * @brief Intel IO APIC/xAPIC driver
14 * This module is a driver for the IO APIC/xAPIC (Advanced Programmable
16 * and P7 (Pentium4) family processors. The IO APIC/xAPIC is included
18 * may be required to enable the IO APIC/xAPIC in some chip sets.
19 * The 8259A interrupt controller is intended for use in a uni-processor
20 * system, IO APIC can be used in either a uni-processor or multi-processor
21 * system. The IO APIC handles interrupts very differently than the 8259A.
23 * - Method of Interrupt Transmission. The IO APIC transmits interrupts
24 * through a 3-wire bus and interrupts are handled without the need for
26 * - Interrupt Priority. The priority of interrupts in the IO APIC is
29 * - More Interrupts. The IO APIC supports a total of 24 interrupts.
31 * The IO APIC unit consists of a set of interrupt input signals, a 24-entry
32 * by 64-bit Interrupt Redirection Table, programmable registers, and a message
34 * Front-Side (system) bus. IO devices inject interrupts into the system by
35 * asserting one of the interrupt lines to the IO APIC. The IO APIC selects the
42 * or the Front-Side (system) bus). IO APIC is used in the Symmetric IO Mode.
43 * The base address of IO APIC is determined in loapic_init() and stored in the
47 * triggered positive low.
49 * This implementation doesn't support multiple IO APICs.
81 * In this case, LDR is read-only to system software and supports up to 16
82 * logical IDs. (Cluster ID: don't care to IO APIC).
149 * @brief Initialize the IO APIC or xAPIC
151 * This routine initializes the IO APIC or xAPIC.
274 int ioapic_suspend(const struct device *port) in ioapic_suspend() argument
279 ARG_UNUSED(port); in ioapic_suspend()
296 int ioapic_resume_from_suspend(const struct device *port) in ioapic_resume_from_suspend() argument
302 ARG_UNUSED(port); in ioapic_resume_from_suspend()
343 ret = -ENOTSUP; in ioapic_pm_action()
424 * @brief Read a 32 bit IO APIC register
426 * This routine reads the specified IO APIC register using indirect addressing.
450 * @brief Write a 32 bit IO APIC register
452 * This routine writes the specified IO APIC register using indirect addressing.
473 * @brief Get low 32 bits of Redirection Table entry
475 * This routine reads the low-order 32 bits of a Redirection Table entry.
478 * @return 32 low-order bits
489 * @brief Set low 32 bits of Redirection Table entry
491 * This routine writes the low-order 32 bits of a Redirection Table entry.
507 * This routine writes the high-order 32 bits of a Redirection Table entry.
521 * @brief Modify low 32 bits of Redirection Table entry
523 * This routine modifies selected portions of the low-order 32 bits of a