Lines Matching full:apic
12 * @brief Intel IO APIC/xAPIC driver
14 * This module is a driver for the IO APIC/xAPIC (Advanced Programmable
16 * and P7 (Pentium4) family processors. The IO APIC/xAPIC is included
18 * may be required to enable the IO APIC/xAPIC in some chip sets.
20 * system, IO APIC can be used in either a uni-processor or multi-processor
21 * system. The IO APIC handles interrupts very differently than the 8259A.
23 * - Method of Interrupt Transmission. The IO APIC transmits interrupts
26 * - Interrupt Priority. The priority of interrupts in the IO APIC is
29 * - More Interrupts. The IO APIC supports a total of 24 interrupts.
31 * The IO APIC unit consists of a set of interrupt input signals, a 24-entry
33 * unit for sending and receiving APIC messages over the APIC bus or the
35 * asserting one of the interrupt lines to the IO APIC. The IO APIC selects the
41 * the table is used to transmit a message to other APIC units (via the APIC bus
42 * or the Front-Side (system) bus). IO APIC is used in the Symmetric IO Mode.
43 * The base address of IO APIC is determined in loapic_init() and stored in the
78 * LDR bits[24:31] can accommodate up to 8 logical APIC IDs.
82 * logical IDs. (Cluster ID: don't care to IO APIC).
149 * @brief Initialize the IO APIC or xAPIC
151 * This routine initializes the IO APIC or xAPIC.
188 * @brief Enable a specified APIC interrupt input line
190 * This routine enables a specified APIC interrupt input line.
201 * @brief Disable a specified APIC interrupt input line
203 * This routine disables a specified APIC interrupt input line.
424 * @brief Read a 32 bit IO APIC register
426 * This routine reads the specified IO APIC register using indirect addressing.
450 * @brief Write a 32 bit IO APIC register
452 * This routine writes the specified IO APIC register using indirect addressing.