Lines Matching full:define
10 #define ZEPHYR_DRIVERS_IEEE802154_IEEE802154_RF2XX_REGS_H_
13 #define RF2XX_AES_BLOCK_SIZE 16
14 #define RF2XX_AES_CORE_CYCLE_TIME 24 /* us */
15 #define RF2XX_RANDOM_NUMBER_UPDATE_INTERVAL 1 /* us */
16 #define RX2XX_FRAME_HEADER_SIZE 2
17 #define RX2XX_FRAME_FOOTER_SIZE 3
18 #define RX2XX_FRAME_FCS_LENGTH 2
19 #define RX2XX_FRAME_MIN_PHR_SIZE 5
20 #define RX2XX_FRAME_PHR_INDEX 1
21 #define RX2XX_FRAME_LQI_INDEX 2
22 #define RX2XX_FRAME_ED_INDEX 3
23 #define RX2XX_FRAME_TRAC_INDEX 4
24 #define RF2XX_MAX_PSDU_LENGTH 127
25 #define RX2XX_MAX_FRAME_SIZE 132
27 #define RF2XX_RSSI_BPSK_20 -100
28 #define RF2XX_RSSI_BPSK_40 -99
29 #define RF2XX_RSSI_OQPSK_SIN_RC_100 -98
30 #define RF2XX_RSSI_OQPSK_SIN_250 -97
31 #define RF2XX_RSSI_OQPSK_RC_250 -97
34 #define RF2XX_TRX_STATUS_REG 0x01
35 #define RF2XX_TRX_STATE_REG 0x02
36 #define RF2XX_TRX_CTRL_0_REG 0x03
37 #define RF2XX_TRX_CTRL_1_REG 0x04
38 #define RF2XX_PHY_TX_PWR_REG 0x05
39 #define RF2XX_PHY_RSSI_REG 0x06
40 #define RF2XX_PHY_ED_LEVEL_REG 0x07
41 #define RF2XX_PHY_CC_CCA_REG 0x08
42 #define RF2XX_CCA_THRES_REG 0x09
43 #define RF2XX_RX_CTRL_REG 0x0a
44 #define RF2XX_SFD_VALUE_REG 0x0b
45 #define RF2XX_TRX_CTRL_2_REG 0x0c
46 #define RF2XX_ANT_DIV_REG 0x0d
47 #define RF2XX_IRQ_MASK_REG 0x0e
48 #define RF2XX_IRQ_STATUS_REG 0x0f
49 #define RF2XX_VREG_CTRL_REG 0x10
50 #define RF2XX_BATMON_REG 0x11
51 #define RF2XX_XOSC_CTRL_REG 0x12
52 #define RF2XX_CC_CTRL_0_REG 0x13
53 #define RF2XX_CC_CTRL_1_REG 0x14
54 #define RF2XX_RX_SYN_REG 0x15
55 #define RF2XX_TRX_RPC_REG 0x16
56 #define RF2XX_RF_CTRL_0_REG 0x16
57 #define RF2XX_XAH_CTRL_1_REG 0x17
58 #define RF2XX_FTN_CTRL_REG 0x18
59 #define RF2XX_RF_CTRL_1_REG 0x19
60 #define RF2XX_XAH_CTRL_2_REG 0x19
61 #define RF2XX_PLL_CF_REG 0x1a
62 #define RF2XX_PLL_DCU_REG 0x1b
63 #define RF2XX_PART_NUM_REG 0x1c
64 #define RF2XX_VERSION_NUM_REG 0x1d
65 #define RF2XX_MAN_ID_0_REG 0x1e
66 #define RF2XX_MAN_ID_1_REG 0x1f
67 #define RF2XX_SHORT_ADDR_0_REG 0x20
68 #define RF2XX_SHORT_ADDR_1_REG 0x21
69 #define RF2XX_PAN_ID_0_REG 0x22
70 #define RF2XX_PAN_ID_1_REG 0x23
71 #define RF2XX_IEEE_ADDR_0_REG 0x24
72 #define RF2XX_IEEE_ADDR_1_REG 0x25
73 #define RF2XX_IEEE_ADDR_2_REG 0x26
74 #define RF2XX_IEEE_ADDR_3_REG 0x27
75 #define RF2XX_IEEE_ADDR_4_REG 0x28
76 #define RF2XX_IEEE_ADDR_5_REG 0x29
77 #define RF2XX_IEEE_ADDR_6_REG 0x2a
78 #define RF2XX_IEEE_ADDR_7_REG 0x2b
79 #define RF2XX_XAH_CTRL_0_REG 0x2c
80 #define RF2XX_CSMA_SEED_0_REG 0x2d
81 #define RF2XX_CSMA_SEED_1_REG 0x2e
82 #define RF2XX_CSMA_BE_REG 0x2f
83 #define RF2XX_TST_CTRL_DIGI_REG 0x36
84 #define RF2XX_PHY_TX_TIME_REG 0x3b
85 #define RF2XX_PHY_PMU_VALUE_REG 0x3b
86 #define RF2XX_TST_AGC_REG 0x3c
87 #define RF2XX_TST_SDM_REG 0x3d
89 #define RF2XX_AES_STATUS_REG 0x82
90 #define RF2XX_AES_CTRL_REG 0x83
91 #define RF2XX_AES_KEY_REG 0x84
92 #define RF2XX_AES_STATE_REG 0x84
93 #define RF2XX_AES_CTRL_M_REG 0x94
96 #define RF2XX_CCA_DONE 7
97 #define RF2XX_CCA_STATUS 6
98 #define RF2XX_TRX_STATUS 0
101 #define RF2XX_TRAC_STATUS 5
102 #define RF2XX_TRX_CMD 0
103 #define RF2XX_TRAC_BIT_MASK 7
106 #define RF2XX_TOM_EN 7
107 #define RF2XX_PAD_IO 6
108 #define RF2XX_PAD_IO_CLKM 4
109 #define RF2XX_PMU_EN 4
110 #define RF2XX_PMU_IF_INVERSE 4
111 #define RF2XX_CLKM_SHA_SEL 3
112 #define RF2XX_CLKM_CTRL 0
115 #define RF2XX_PA_EXT_EN 7
116 #define RF2XX_IRQ_2_EXT_EN 6
117 #define RF2XX_TX_AUTO_CRC_ON 5
118 #define RF2XX_RX_BL_CTRL 4
119 #define RF2XX_SPI_CMD_MODE 2
120 #define RF2XX_IRQ_MASK_MODE 1
121 #define RF2XX_IRQ_POLARITY 0
124 #define RF2XX_PA_BOOST 7
125 #define RF2XX_PA_BUF_LT 6
126 #define RF2XX_GC_PA 5
127 #define RF2XX_PA_SHR_LT 4
128 #define RF2XX_TX_PWR 0
131 #define RF2XX_RX_CRC_VALID 7
132 #define RF2XX_RND_VALUE 5
133 #define RF2XX_RSSI 0
134 #define RF2XX_RSSI_MASK 0x1F
137 #define RF2XX_CCA_REQUEST 7
138 #define RF2XX_CCA_MODE 5
139 #define RF2XX_CHANNEL 0
142 #define RF2XX_CCA_CS_THRES 4
143 #define RF2XX_CCA_ED_THRES 0
146 #define RF2XX_PEL_SHIFT_VALUE 6
147 #define RF2XX_JCM_EN 5
148 #define RF2XX_PDT_THRES 0
151 #define RF2XX_RX_SAFE_MODE 7
152 #define RF2XX_TRX_OFF_AVDD_EN 6
153 #define RF2XX_OQPSK_SCRAM_EN 5
154 #define RF2XX_OQPSK_SUB1_RC_EN 4
155 #define RF2XX_ALT_SPECTRUM 4
156 #define RF2XX_BPSK_OQPSK 3
157 #define RF2XX_SUB_MODE 2
158 #define RF2XX_OQPSK_DATA_RATE 0
159 #define RF2XX_SUB_CHANNEL_MASK 0x3F
160 #define RF2XX_CC_BPSK_20 0x00
161 #define RF2XX_CC_BPSK_40 0x04
162 #define RF2XX_CC_OQPSK_SIN_RC_100 0x08
163 #define RF2XX_CC_OQPSK_SIN_250 0x0C
164 #define RF2XX_CC_OQPSK_RC_250 0x1C
167 #define RF2XX_ANT_SEL 7
168 #define RF2XX_ANT_DIV_EN 3
169 #define RF2XX_ANT_EXT_SW_EN 2
170 #define RF2XX_ANT_CTRL 0
173 #define RF2XX_BAT_LOW 7
174 #define RF2XX_TRX_UR 6
175 #define RF2XX_AMI 5
176 #define RF2XX_CCA_ED_DONE 4
177 #define RF2XX_TRX_END 3
178 #define RF2XX_RX_START 2
179 #define RF2XX_PLL_UNLOCK 1
180 #define RF2XX_PLL_LOCK 0
183 #define RF2XX_AVREG_EXT 7
184 #define RF2XX_AVDD_OK 6
185 #define RF2XX_DVREG_EXT 3
186 #define RF2XX_DVDD_OK 2
189 #define RF2XX_PLL_LOCK_CP 7
190 #define RF2XX_BATMON_OK 5
191 #define RF2XX_BATMON_HR 4
192 #define RF2XX_BATMON_VTH 0
195 #define RF2XX_XTAL_MODE 4
196 #define RF2XX_XTAL_TRIM 0
199 #define RF2XX_CC_BAND 0
202 #define RF2XX_RX_PDT_DIS 7
203 #define RF2XX_RX_OVERRIDE 4
204 #define RF2XX_RX_PDT_LEVEL 0
207 #define RF2XX_RX_RPC_CTRL 6
208 #define RF2XX_RX_RPC_EN 5
209 #define RF2XX_PDT_RPC_EN 4
210 #define RF2XX_PLL_RPC_EN 3
211 #define RF2XX_XAH_TX_RPC_EN 2
212 #define RF2XX_IPAN_RPC_EN 1
215 #define RF2XX_PA_CHIP_LT 6
216 #define RF2XX_F_SHIFT_MODE 2
217 #define RF2XX_GC_TX_OFFS 0
218 #define RF2XX_GC_TX_OFFS_MASK 3
221 #define RF2XX_ARET_TX_TS_EN 7
222 #define RF2XX_CSMA_LBT_MODE 6
223 #define RF2XX_AACK_FLTR_RES_FT 5
224 #define RF2XX_AACK_UPLD_RES_FT 4
225 #define RF2XX_AACK_ACK_TIME 2
226 #define RF2XX_AACK_PROM_MODE 1
227 #define RF2XX_AACK_SPC_EN 0
230 #define RF2XX_FTN_START 7
231 #define RF2XX_FTNV 0
234 #define RF2XX_RF_MC 4
237 #define RF2XX_ARET_FRAME_RETRIES 4
238 #define RF2XX_ARET_CSMA_RETRIES 1
241 #define RF2XX_PLL_CF_START 7
242 #define RF2XX_PLL_CF 0
245 #define RF2XX_PLL_DCU_START 7
248 #define RF2XX_MAX_FRAME_RETRES 4
249 #define RF2XX_MAX_CSMA_RETRES 1
250 #define RF2XX_SLOTTED_OPERATION 0
253 #define RF2XX_AACK_FVN_MODE 6
254 #define RF2XX_AACK_SET_PD 5
255 #define RF2XX_AACK_DIS_ACK 4
256 #define RF2XX_AACK_I_AM_COORD 3
257 #define RF2XX_CSMA_SEED_1 0
260 #define RF2XX_MAX_BE 4
261 #define RF2XX_MIN_BE 0
264 #define RF2XX_TST_CTRL_DIG 0
267 #define RF2XX_IRC_TX_TIME 0
270 #define RF2XX_AGC_HOLD_SEL 5
271 #define RF2XX_AGC_RST 4
272 #define RF2XX_AGC_OFF 3
273 #define RF2XX_AGC_HOLD 2
274 #define RF2XX_GC 0
277 #define RF2XX_MOD_SEL 7
278 #define RF2XX_MOD 6
279 #define RF2XX_TX_RX 5
280 #define RF2XX_TX_RX_SEL 4
283 #define RF2XX_AES_CTRL_DIR 3
284 #define RF2XX_AES_CTRL_MODE 4
285 #define RF2XX_AES_CTRL_REQUEST 7
288 #define RF2XX_AES_STATUS_DONE 0
289 #define RF2XX_AES_STATUS_ER 7
291 #define RF2XX_RF_CMD_REG_W ((1 << 7) | (1 << 6))
292 #define RF2XX_RF_CMD_REG_R ((1 << 7) | (0 << 6))
293 #define RF2XX_RF_CMD_FRAME_W ((0 << 7) | (1 << 6) | (1 << 5))
294 #define RF2XX_RF_CMD_FRAME_R ((0 << 7) | (0 << 6) | (1 << 5))
295 #define RF2XX_RF_CMD_SRAM_W ((0 << 7) | (1 << 6) | (0 << 5))
296 #define RF2XX_RF_CMD_SRAM_R ((0 << 7) | (0 << 6) | (0 << 5))
299 #define RF2XX_RX_TRAC_STATUS 4
300 #define RF2XX_RX_TRAC_BIT_MASK RF2XX_TRAC_BIT_MASK