1 /* ieee802154_rf2xx_iface.c - ATMEL RF2XX IEEE 802.15.4 Interface */
4  * Copyright (c) 2019-2020 Gerson Fernando Budke
6  * SPDX-License-Identifier: Apache-2.0
29 	const struct rf2xx_config *conf = dev->config;  in rf2xx_iface_phy_rst()
32 	gpio_pin_set_dt(&conf->reset_gpio, 0);  in rf2xx_iface_phy_rst()
33 	gpio_pin_set_dt(&conf->slptr_gpio, 0);  in rf2xx_iface_phy_rst()
38 	gpio_pin_set_dt(&conf->reset_gpio, 1);  in rf2xx_iface_phy_rst()
40 	gpio_pin_set_dt(&conf->reset_gpio, 0);  in rf2xx_iface_phy_rst()
44 	const struct rf2xx_config *conf = dev->config;  in rf2xx_iface_phy_tx_start()
47 	gpio_pin_set_dt(&conf->slptr_gpio, 1);  in rf2xx_iface_phy_tx_start()
51 	gpio_pin_set_dt(&conf->slptr_gpio, 0);  in rf2xx_iface_phy_tx_start()
57 	const struct rf2xx_config *conf = dev->config;  in rf2xx_iface_reg_read()
86 	if (spi_transceive_dt(&conf->spi, &tx, &rx) != 0) {  in rf2xx_iface_reg_read()
87 		LOG_ERR("Failed to exec rf2xx_reg_read CMD at address %d",  in rf2xx_iface_reg_read()
91 	LOG_DBG("Read Address: %02X, PhyStatus: %02X, RegVal: %02X",  in rf2xx_iface_reg_read()
101 	const struct rf2xx_config *conf = dev->config;  in rf2xx_iface_reg_write()
129 	if (spi_transceive_dt(&conf->spi, &tx, &rx) != 0) {  in rf2xx_iface_reg_write()
130 		LOG_ERR("Failed to exec rf2xx_reg_write at address %d",  in rf2xx_iface_reg_write()
134 	LOG_DBG("Write Address: %02X, PhyStatus: %02X, RegVal: %02X",  in rf2xx_iface_reg_write()
170 			    uint8_t length)  in rf2xx_iface_frame_read()  argument
172 	const struct rf2xx_config *conf = dev->config;  in rf2xx_iface_frame_read()
185 		.len = length  in rf2xx_iface_frame_read()
192 	if (spi_transceive_dt(&conf->spi, &tx, &rx) != 0) {  in rf2xx_iface_frame_read()
196 	LOG_DBG("Frame R: PhyStatus: %02X. length: %02X", data[0], length);  in rf2xx_iface_frame_read()
197 	LOG_HEXDUMP_DBG(data + RX2XX_FRAME_HEADER_SIZE, length, "payload");  in rf2xx_iface_frame_read()
202 			     uint8_t length)  in rf2xx_iface_frame_write()  argument
204 	const struct rf2xx_config *conf = dev->config;  in rf2xx_iface_frame_write()
210 	if (length > 125) {  in rf2xx_iface_frame_write()
211 		length = 125;  in rf2xx_iface_frame_write()
214 	phr = length + RX2XX_FRAME_FCS_LENGTH;  in rf2xx_iface_frame_write()
227 			.len = length  in rf2xx_iface_frame_write()
243 	if (spi_transceive_dt(&conf->spi, &tx, &rx) != 0) {  in rf2xx_iface_frame_write()
247 	LOG_DBG("Frame W: PhyStatus: %02X. length: %02X", status, length);  in rf2xx_iface_frame_write()
248 	LOG_HEXDUMP_DBG(data, length, "payload");  in rf2xx_iface_frame_write()
252 			    uint8_t address,  in rf2xx_iface_sram_read()  argument
254 			    uint8_t length)  in rf2xx_iface_sram_read()  argument
256 	const struct rf2xx_config *conf = dev->config;  in rf2xx_iface_sram_read()
266 			.buf = &address,  in rf2xx_iface_sram_read()
281 			.len = length  in rf2xx_iface_sram_read()
289 	if (spi_transceive_dt(&conf->spi, &tx, &rx) != 0) {  in rf2xx_iface_sram_read()
293 	LOG_DBG("SRAM R: length: %02X, status: %02X", length, status[0]);  in rf2xx_iface_sram_read()
294 	LOG_HEXDUMP_DBG(data, length, "content");  in rf2xx_iface_sram_read()