91 		rf2xx_iface_reg_write(dev, RF2XX_TRX_STATE_REG,  in rf2xx_trx_set_state()
98 		rf2xx_iface_reg_write(dev, RF2XX_TRX_STATE_REG, state);  in rf2xx_trx_set_state()
398 	rf2xx_iface_reg_write(dev, RF2XX_TRX_CTRL_2_REG, reg | cc_mask);  in rf2xx_configure_sub_channel()
417 	rf2xx_iface_reg_write(dev, RF2XX_RF_CTRL_0_REG, reg | gc_tx_offset);  in rf2xx_configure_trx_path()
463 	rf2xx_iface_reg_write(dev, RF2XX_PHY_CC_CCA_REG, reg | channel);  in rf2xx_set_channel()
489 		rf2xx_iface_reg_write(dev, RF2XX_PHY_TX_PWR_REG, 0);  in rf2xx_set_txpower()
540 	rf2xx_iface_reg_write(dev, RF2XX_PHY_TX_PWR_REG, val);  in rf2xx_set_txpower()
556 			rf2xx_iface_reg_write(dev, (RF2XX_IEEE_ADDR_0_REG + i),  in rf2xx_set_ieee_addr()
561 			rf2xx_iface_reg_write(dev, (RF2XX_IEEE_ADDR_0_REG + i),  in rf2xx_set_ieee_addr()
578 	rf2xx_iface_reg_write(dev, RF2XX_SHORT_ADDR_0_REG, short_addr_le[0]);  in rf2xx_set_short_addr()
579 	rf2xx_iface_reg_write(dev, RF2XX_SHORT_ADDR_1_REG, short_addr_le[1]);  in rf2xx_set_short_addr()
580 	rf2xx_iface_reg_write(dev, RF2XX_CSMA_SEED_0_REG,  in rf2xx_set_short_addr()
598 	rf2xx_iface_reg_write(dev, RF2XX_PAN_ID_0_REG, pan_id_le[0]);  in rf2xx_set_pan_id()
599 	rf2xx_iface_reg_write(dev, RF2XX_PAN_ID_1_REG, pan_id_le[1]);  in rf2xx_set_pan_id()
663 			rf2xx_iface_reg_write(dev, RF2XX_XAH_CTRL_0_REG, 0x0E);  in rf2xx_tx()
667 			rf2xx_iface_reg_write(dev, RF2XX_CSMA_BE_REG, 0x53);  in rf2xx_tx()
669 			rf2xx_iface_reg_write(dev, RF2XX_XAH_CTRL_0_REG, 0x38);  in rf2xx_tx()
673 			rf2xx_iface_reg_write(dev, RF2XX_CSMA_BE_REG, 0x00);  in rf2xx_tx()
675 			rf2xx_iface_reg_write(dev, RF2XX_XAH_CTRL_0_REG, 0x00);  in rf2xx_tx()
764 		rf2xx_iface_reg_write(dev, RF2XX_CSMA_SEED_1_REG, reg);  in rf2xx_pan_coord_set()
768 		rf2xx_iface_reg_write(dev, RF2XX_CSMA_SEED_1_REG, reg);  in rf2xx_pan_coord_set()
784 		rf2xx_iface_reg_write(dev, RF2XX_XAH_CTRL_1_REG, reg);  in rf2xx_promiscuous_set()
788 		rf2xx_iface_reg_write(dev, RF2XX_CSMA_SEED_1_REG, reg);  in rf2xx_promiscuous_set()
792 		rf2xx_iface_reg_write(dev, RF2XX_XAH_CTRL_1_REG, reg);  in rf2xx_promiscuous_set()
796 		rf2xx_iface_reg_write(dev, RF2XX_CSMA_SEED_1_REG, reg);  in rf2xx_promiscuous_set()
860 		rf2xx_iface_reg_write(dev, RF2XX_TRX_STATE_REG,  in power_on_and_setup()
899 	rf2xx_iface_reg_write(dev, RF2XX_TRX_CTRL_0_REG, config);  in power_on_and_setup()
905 	rf2xx_iface_reg_write(dev, RF2XX_TRX_CTRL_1_REG, config);  in power_on_and_setup()
911 	rf2xx_iface_reg_write(dev, RF2XX_TRX_CTRL_2_REG, config);  in power_on_and_setup()
915 		rf2xx_iface_reg_write(dev, RF2XX_CC_CTRL_1_REG, 0);  in power_on_and_setup()
924 	rf2xx_iface_reg_write(dev, RF2XX_IRQ_MASK_REG, config);  in power_on_and_setup()