Lines Matching refs:DEFINE_DREG_WRITE
69 #define DEFINE_DREG_WRITE(__reg_name, __reg_addr) \ macro
98 DEFINE_DREG_WRITE(irqsts1, MCR20A_IRQSTS1)
99 DEFINE_DREG_WRITE(irqsts2, MCR20A_IRQSTS2)
100 DEFINE_DREG_WRITE(irqsts3, MCR20A_IRQSTS3)
101 DEFINE_DREG_WRITE(phy_ctrl1, MCR20A_PHY_CTRL1)
102 DEFINE_DREG_WRITE(phy_ctrl2, MCR20A_PHY_CTRL2)
103 DEFINE_DREG_WRITE(phy_ctrl3, MCR20A_PHY_CTRL3)
104 DEFINE_DREG_WRITE(phy_ctrl4, MCR20A_PHY_CTRL4)
105 DEFINE_DREG_WRITE(src_ctrl, MCR20A_SRC_CTRL)
106 DEFINE_DREG_WRITE(pll_int0, MCR20A_PLL_INT0)
107 DEFINE_DREG_WRITE(pa_pwr, MCR20A_PA_PWR)
108 DEFINE_DREG_WRITE(asm_ctrl1, MCR20A_ASM_CTRL1)
109 DEFINE_DREG_WRITE(asm_ctrl2, MCR20A_ASM_CTRL2)
110 DEFINE_DREG_WRITE(overwrite_ver, MCR20A_OVERWRITE_VER)
111 DEFINE_DREG_WRITE(clk_out_ctrl, MCR20A_CLK_OUT_CTRL)
112 DEFINE_DREG_WRITE(pwr_modes, MCR20A_PWR_MODES)