Lines Matching refs:DEFINE_DREG_READ
67 #define DEFINE_DREG_READ(__reg_name, __reg_addr) \ macro
77 DEFINE_DREG_READ(irqsts1, MCR20A_IRQSTS1)
78 DEFINE_DREG_READ(irqsts2, MCR20A_IRQSTS2)
79 DEFINE_DREG_READ(irqsts3, MCR20A_IRQSTS3)
80 DEFINE_DREG_READ(phy_ctrl1, MCR20A_PHY_CTRL1)
81 DEFINE_DREG_READ(phy_ctrl2, MCR20A_PHY_CTRL2)
82 DEFINE_DREG_READ(phy_ctrl3, MCR20A_PHY_CTRL3)
83 DEFINE_DREG_READ(rx_frm_len, MCR20A_RX_FRM_LEN)
84 DEFINE_DREG_READ(phy_ctrl4, MCR20A_PHY_CTRL4)
85 DEFINE_DREG_READ(src_ctrl, MCR20A_SRC_CTRL)
86 DEFINE_DREG_READ(cca1_ed_fnl, MCR20A_CCA1_ED_FNL)
87 DEFINE_DREG_READ(pll_int0, MCR20A_PLL_INT0)
88 DEFINE_DREG_READ(pa_pwr, MCR20A_PA_PWR)
89 DEFINE_DREG_READ(seq_state, MCR20A_SEQ_STATE)
90 DEFINE_DREG_READ(lqi_value, MCR20A_LQI_VALUE)
91 DEFINE_DREG_READ(rssi_cca_cnt, MCR20A_RSSI_CCA_CNT)
92 DEFINE_DREG_READ(asm_ctrl1, MCR20A_ASM_CTRL1)
93 DEFINE_DREG_READ(asm_ctrl2, MCR20A_ASM_CTRL2)
94 DEFINE_DREG_READ(overwrite_ver, MCR20A_OVERWRITE_VER)
95 DEFINE_DREG_READ(clk_out_ctrl, MCR20A_CLK_OUT_CTRL)
96 DEFINE_DREG_READ(pwr_modes, MCR20A_PWR_MODES)