315 static inline void dwt_reg_write_u8(const struct device *dev,  in dwt_reg_write_u8()  function
339 	dwt_reg_write_u8(dev, DWT_PMSC_ID, DWT_PMSC_CTRL0_SOFTRESET_OFFSET,  in dwt_reset_rfrx()
341 	dwt_reg_write_u8(dev, DWT_PMSC_ID, DWT_PMSC_CTRL0_SOFTRESET_OFFSET,  in dwt_reset_rfrx()
349 	dwt_reg_write_u8(dev, DWT_SYS_CTRL_ID, DWT_SYS_CTRL_OFFSET,  in dwt_disable_txrx()
848 	dwt_reg_write_u8(dev, DWT_SYS_CTRL_ID, DWT_SYS_CTRL_OFFSET, sys_ctrl);  in dwt_tx()
903 	dwt_reg_write_u8(dev, DWT_SYS_CFG_ID, 0, (uint8_t)sys_cfg_ff);  in dwt_set_frame_filter()
1111 	dwt_reg_write_u8(dev, DWT_AON_ID, DWT_AON_CTRL_OFFSET,  in dwt_stop()
1142 	dwt_reg_write_u8(dev, DWT_PMSC_ID, DWT_PMSC_CTRL0_OFFSET, sclks);  in dwt_set_sysclks_auto()
1149 	dwt_reg_write_u8(dev, DWT_OTP_IF_ID, DWT_OTP_CTRL,  in dwt_otpmem_read()
1152 	dwt_reg_write_u8(dev, DWT_OTP_IF_ID, DWT_OTP_CTRL, 0x00);  in dwt_otpmem_read()
1178 	dwt_reg_write_u8(dev, DWT_PMSC_ID, DWT_PMSC_CTRL0_SOFTRESET_OFFSET,  in dwt_initialise_dev()
1181 	dwt_reg_write_u8(dev, DWT_PMSC_ID, DWT_PMSC_CTRL0_SOFTRESET_OFFSET,  in dwt_initialise_dev()
1190 	dwt_reg_write_u8(dev, DWT_EXT_SYNC_ID, DWT_EC_CTRL_OFFSET,  in dwt_initialise_dev()
1196 		dwt_reg_write_u8(dev, DWT_OTP_IF_ID, DWT_OTP_SF,  in dwt_initialise_dev()
1219 	dwt_reg_write_u8(dev, DWT_FS_CTRL_ID, DWT_FS_XTALT_OFFSET, xtal_trim);  in dwt_initialise_dev()
1246 	dwt_reg_write_u8(dev, DWT_AON_ID, DWT_AON_CFG1_OFFSET, 0);  in dwt_initialise_dev()
1260 	dwt_reg_write_u8(dev, DWT_AON_ID, DWT_AON_CFG0_OFFSET,  in dwt_initialise_dev()
1385 	dwt_reg_write_u8(dev, DWT_LDE_IF_ID, DWT_LDE_CFG1_OFFSET,  in dwt_configure_rf_phy()
1401 	dwt_reg_write_u8(dev, DWT_FS_CTRL_ID, DWT_FS_PLLTUNE_OFFSET, pll_tune);  in dwt_configure_rf_phy()
1404 	dwt_reg_write_u8(dev, DWT_RF_CONF_ID, DWT_RF_RXCTRLH_OFFSET, rxctrlh);  in dwt_configure_rf_phy()
1419 	dwt_reg_write_u8(dev, DWT_DRX_CONF_ID, DWT_DRX_TUNE4H_OFFSET, tune4h);  in dwt_configure_rf_phy()
1437 		dwt_reg_write_u8(dev, DWT_USR_SFD_ID, 0x00,  in dwt_configure_rf_phy()
1473 	dwt_reg_write_u8(dev, DWT_TX_CAL_ID, DWT_TC_PGDELAY_OFFSET, pgdelay);  in dwt_configure_rf_phy()
1483 	dwt_reg_write_u8(dev, DWT_SYS_CTRL_ID, DWT_SYS_CTRL_OFFSET,  in dwt_configure_rf_phy()