267 static inline uint32_t dwt_reg_read_u32(const struct device *dev,  in dwt_reg_read_u32()  function
367 	sys_cfg = dwt_reg_read_u32(dev, DWT_SYS_CFG_ID, 0);  in dwt_enable_rx()
414 	rx_finfo = dwt_reg_read_u32(dev, DWT_RX_FINFO_ID, DWT_RX_FINFO_OFFSET);  in dwt_irq_handle_rx()
588 	sys_stat = dwt_reg_read_u32(dev, DWT_SYS_STATUS_ID, 0);  in dwt_irq_work_handler()
817 			dwt_reg_read_u32(dev, DWT_SYS_TIME_ID, 1));  in dwt_tx()
835 	tx_fctrl = dwt_reg_read_u32(dev, DWT_TX_FCTRL_ID, 0);  in dwt_tx()
851 		uint32_t sys_stat = dwt_reg_read_u32(dev, DWT_SYS_STATUS_ID, 0);  in dwt_tx()
872 			dwt_reg_read_u32(dev, DWT_SYS_TIME_ID, 1));  in dwt_tx()
1047 	pmsc_ctrl0 = dwt_reg_read_u32(dev, DWT_PMSC_ID, DWT_PMSC_CTRL0_OFFSET);  in dwt_set_rx_mode()
1063 	if (dwt_reg_read_u32(dev, DWT_DEV_ID_ID, 0) != DWT_DEVICE_ID) {  in dwt_start()
1070 		if (dwt_reg_read_u32(dev, DWT_DEV_ID_ID, 0) != DWT_DEVICE_ID) {  in dwt_start()
1155 	return dwt_reg_read_u32(dev, DWT_OTP_IF_ID, DWT_OTP_RDAT);  in dwt_otpmem_read()
1337 	sys_cfg = dwt_reg_read_u32(dev, DWT_SYS_CFG_ID, 0);  in dwt_configure_rf_phy()
1338 	tx_fctrl = dwt_reg_read_u32(dev, DWT_TX_FCTRL_ID, 0);  in dwt_configure_rf_phy()
1577 	if (dwt_reg_read_u32(dev, DWT_DEV_ID_ID, 0) != DWT_DEVICE_ID) {  in dw1000_init()