Lines Matching refs:sclh_i2c
450 uint32_t i3c_clock, uint8_t *scll_od, uint8_t *sclh_i2c) in i3c_stm32_calc_scll_od_sclh_i2c() argument
460 *sclh_i2c = DIV_ROUND_UP(i3c_clock, i2c_bus_freq) - *scll_od - 2; in i3c_stm32_calc_scll_od_sclh_i2c()
461 if (*sclh_i2c < in i3c_stm32_calc_scll_od_sclh_i2c()
474 *sclh_i2c = DIV_ROUND_UP(i3c_clock, i2c_bus_freq) - *scll_od - 2; in i3c_stm32_calc_scll_od_sclh_i2c()
477 if (*sclh_i2c < in i3c_stm32_calc_scll_od_sclh_i2c()
497 *sclh_i2c = DIV_ROUND_UP(i3c_clock, i2c_bus_freq) - in i3c_stm32_calc_scll_od_sclh_i2c()
506 *sclh_i2c = DIV_ROUND_UP(i3c_clock, i2c_bus_freq) - in i3c_stm32_calc_scll_od_sclh_i2c()
508 if (*sclh_i2c < in i3c_stm32_calc_scll_od_sclh_i2c()
519 if (*sclh_i2c < in i3c_stm32_calc_scll_od_sclh_i2c()
536 *sclh_i2c = 0; in i3c_stm32_calc_scll_od_sclh_i2c()
540 LOG_DBG("TimingReg0: SCLL_OD = %d, SCLH_I2C = %d", *scll_od, *sclh_i2c); in i3c_stm32_calc_scll_od_sclh_i2c()
576 uint8_t sclh_i2c = 0; in i3c_stm32_config_clk_wave() local
585 ret = i3c_stm32_calc_scll_od_sclh_i2c(dev, i2c_bus_freq, i3c_clock, &scll_od, &sclh_i2c); in i3c_stm32_config_clk_wave()
597 clk_wave = ((uint32_t)sclh_i2c << 24) | ((uint32_t)scll_od << 16) | in i3c_stm32_config_clk_wave()