Lines Matching defs:i3c_stm32_data

121 struct i3c_stm32_data {  struct
122 	struct i3c_driver_data drv_data;     /* I3C driver data */
123 	enum i3c_stm32_msg_state msg_state;  /* Current I3C bus state */
124 	enum i3c_stm32_sf_state sf_state;    /* Current I3C status FIFO state */
125 	struct i3c_ccc_payload *ccc_payload; /* Current CCC message payload */
127 		ccc_target_payload; /* Current target addressed by 2nd part of direct CCC command */
129 		*ccc_target_payload_sf; /* Current target addressed
133 	size_t ccc_target_idx;        /* Current target index, used for filling C-FIFO */
134 	struct k_sem device_sync_sem; /* Sync between device communication messages */
135 	struct k_mutex bus_mutex;     /* Sync between transfers */
136 	struct i3c_stm32_msg curr_msg;
137 	uint8_t target_addr;    /* Current target xfer address */
138 	uint8_t num_msgs;       /* Number of messages to send on bus */
140 	struct i3c_stm32_dma_stream dma_rx; /* RX DMA channel config */
141 	struct i3c_stm32_dma_stream dma_tx; /* TX DMA channel config */
142 	struct i3c_stm32_dma_stream dma_tc; /* Control FIFO DMA channel config */
143 	struct i3c_stm32_dma_stream dma_rs; /* Status FIFO DMA channel config */
144 	uint32_t *status_fifo;  /* Pointer to the allocated region for status FIFO words */
145 	uint32_t *control_fifo; /* Pointer to the allocated region for control FIFO words */
146 	size_t fifo_len;        /* The size in bytes for the allocated region for each FIFO */
148 	uint64_t pid;      /* Current DAA target PID */
149 	size_t daa_rx_rcv; /* Number of RX bytes received during DAA */
150 	uint8_t target_id; /* Target id */
152 	uint32_t ibi_payload;      /* Received ibi payload */
153 	uint32_t ibi_payload_size; /* Received payload size */
154 	uint32_t ibi_target_addr;  /* Received target dynamic address */
155 	struct {
158 	} ibi;
159 	struct k_sem ibi_lock_sem; /* Semaphore used for ibi requests */