Lines Matching refs:SET_FIELD

433 	SET_FIELD(val, NPCX_I3C_MCTRL_IBIRESP, MCTRL_IBIRESP_NACK);  in npcx_i3c_request_daa()
436 SET_FIELD(val, NPCX_I3C_MCTRL_REQUEST, MCTRL_REQUEST_PROCESSDAA); in npcx_i3c_request_daa()
453 SET_FIELD(val, NPCX_I3C_MCTRL_IBIRESP, MCTRL_IBIRESP_ACK); in npcx_i3c_request_auto_ibi()
454 SET_FIELD(val, NPCX_I3C_MCTRL_REQUEST, MCTRL_REQUEST_AUTOIBI); in npcx_i3c_request_auto_ibi()
486 SET_FIELD(mctrl, NPCX_I3C_MCTRL_REQUEST, MCTRL_REQUEST_EMITSTARTADDR); in npcx_i3c_request_emit_start()
489 SET_FIELD(mctrl, NPCX_I3C_MCTRL_TYPE, op_type); in npcx_i3c_request_emit_start()
492 SET_FIELD(mctrl, NPCX_I3C_MCTRL_IBIRESP, MCTRL_IBIRESP_NACK); in npcx_i3c_request_emit_start()
495 SET_FIELD(mctrl, NPCX_I3C_MCTRL_ADDR, addr); in npcx_i3c_request_emit_start()
500 SET_FIELD(mctrl, NPCX_I3C_MCTRL_RDTERM, read_sz); /* Set read length */ in npcx_i3c_request_emit_start()
544 SET_FIELD(val, NPCX_I3C_MCTRL_REQUEST, MCTRL_REQUEST_EMITSTOP); in npcx_i3c_request_emit_stop()
568 SET_FIELD(val, NPCX_I3C_MCTRL_TYPE, MCTRL_TYPE_HDR_EXIT); in npcx_i3c_request_hdr_exit()
569 SET_FIELD(val, NPCX_I3C_MCTRL_REQUEST, MCTRL_REQUEST_FORCEEXIT); in npcx_i3c_request_hdr_exit()
610 SET_FIELD(val, NPCX_I3C_MCTRL_IBIRESP, MCTRL_IBIRESP_NACK); in npcx_i3c_ibi_respond_nack()
611 SET_FIELD(val, NPCX_I3C_MCTRL_REQUEST, MCTRL_REQUEST_IBIACKNACK); in npcx_i3c_ibi_respond_nack()
627 SET_FIELD(val, NPCX_I3C_MCTRL_IBIRESP, MCTRL_IBIRESP_ACK); in npcx_i3c_ibi_respond_ack()
628 SET_FIELD(val, NPCX_I3C_MCTRL_REQUEST, MCTRL_REQUEST_IBIACKNACK); in npcx_i3c_ibi_respond_ack()
842 SET_FIELD(i3c_inst->MDMACTRL, NPCX_I3C_MDMACTRL_DMATB, MDMA_DMATB_EN_ONE_FRAME); in npcx_i3c_xfer_write_fifo_dma()
900 SET_FIELD(i3c_inst->MDMACTRL, NPCX_I3C_MDMACTRL_DMAFB, MDMA_DMAFB_EN_MANUAL); in npcx_i3c_xfer_read_fifo_dma()
919 SET_FIELD(i3c_inst->MDMACTRL, NPCX_I3C_MDMACTRL_DMAFB, MDMA_DMAFB_DISABLE); in npcx_i3c_xfer_read_fifo_dma()
1959 SET_FIELD(inst->CTRL, NPCX_I3C_CTRL_IBIDATA, request->payload[0]); in npcx_i3c_target_ibi_raise()
1973 SET_FIELD(inst->IBIEXT1, NPCX_I3C_IBIEXT1_CNT, 0); in npcx_i3c_target_ibi_raise()
1977 SET_FIELD(inst->CTRL, NPCX_I3C_CTRL_EVENT, CTRL_EVENT_IBI); in npcx_i3c_target_ibi_raise()
1995 SET_FIELD(inst->CTRL, NPCX_I3C_CTRL_EVENT, CTRL_EVENT_CNTLR_REQ); in npcx_i3c_target_ibi_raise()
2007 SET_FIELD(inst->CTRL, NPCX_I3C_CTRL_EVENT, CTRL_EVENT_HJ); in npcx_i3c_target_ibi_raise()
2052 SET_FIELD(i3c_inst->DMACTRL, NPCX_I3C_DMACTRL_DMAFB, MDMA_DMAFB_DISABLE); in npcx_i3c_target_disable_mdmafb()
2078 SET_FIELD(i3c_inst->DMACTRL, NPCX_I3C_DMACTRL_DMAFB, MDMA_DMAFB_EN_MANUAL); in npcx_i3c_target_enable_mdmafb()
2097 SET_FIELD(i3c_inst->DMACTRL, NPCX_I3C_DMACTRL_DMATB, MDMA_DMATB_DISABLE); in npcx_i3c_target_disable_mdmatb()
2129 SET_FIELD(i3c_inst->DMACTRL, NPCX_I3C_DMACTRL_DMATB, MDMA_DMAFB_EN_ONE_FRAME); in npcx_i3c_target_enable_mdmatb()
2406 SET_FIELD(inst->MCONFIG, NPCX_I3C_MCONFIG_PPBAUD, timing_cfg.ppbaud); in npcx_i3c_freq_init()
2407 SET_FIELD(inst->MCONFIG, NPCX_I3C_MCONFIG_PPLOW, timing_cfg.pplow); in npcx_i3c_freq_init()
2408 SET_FIELD(inst->MCONFIG, NPCX_I3C_MCONFIG_ODBAUD, timing_cfg.odbaud); in npcx_i3c_freq_init()
2414 SET_FIELD(inst->MCONFIG, NPCX_I3C_MCONFIG_I2CBAUD, I3C_BUS_I2C_BAUD_RATE_FAST_MODE); in npcx_i3c_freq_init()
2447 SET_FIELD(inst->MCONFIG, NPCX_I3C_MCONFIG_HKEEP, MCONFIG_HKEEP_EXT_SDA_SCL); in npcx_i3c_apply_cntlr_config()
2468 SET_FIELD(inst->CONFIG, NPCX_I3C_CONFIG_BAMATCH, bamatch); in npcx_i3c_apply_cntlr_config()
2501 SET_FIELD(inst->CONFIG, NPCX_I3C_CONFIG_BAMATCH, bamatch); in npcx_i3c_apply_target_config()
2507 SET_FIELD(inst->VENDORID, NPCX_I3C_VENDORID_VID, (uint32_t)GET_PID_VENDOR_ID(pid)); in npcx_i3c_apply_target_config()
2524 SET_FIELD(inst->IDEXT, NPCX_I3C_IDEXT_DCR, config_target->dcr); in npcx_i3c_apply_target_config()
2525 SET_FIELD(inst->IDEXT, NPCX_I3C_IDEXT_BCR, config_target->bcr); in npcx_i3c_apply_target_config()
2526 SET_FIELD(inst->CONFIG, NPCX_I3C_CONFIG_SADDR, config_target->static_addr); in npcx_i3c_apply_target_config()
2527 SET_FIELD(inst->CONFIG, NPCX_I3C_CONFIG_HDRCMD, CFG_HDRCMD_RD_FROM_FIFIO); in npcx_i3c_apply_target_config()
2528 SET_FIELD(inst->MAXLIMITS, NPCX_I3C_MAXLIMITS_MAXRD, (config_target->max_read_len) & 0xfff); in npcx_i3c_apply_target_config()
2529 SET_FIELD(inst->MAXLIMITS, NPCX_I3C_MAXLIMITS_MAXWR, in npcx_i3c_apply_target_config()
2559 SET_FIELD(inst->MCONFIG, NPCX_I3C_MCONFIG_CTRENA, MCONFIG_CTRENA_CAPABLE); in npcx_i3c_dev_init()
2564 SET_FIELD(inst->MCONFIG, NPCX_I3C_MCONFIG_CTRENA, MCONFIG_CTRENA_ON); in npcx_i3c_dev_init()
2568 SET_FIELD(inst->MCONFIG, NPCX_I3C_MCONFIG_CTRENA, in npcx_i3c_dev_init()