1938 	if (!IS_BIT_SET(inst->CONFIG, NPCX_I3C_CONFIG_TGTENA) ||  in npcx_i3c_target_ibi_raise()
2006 		inst->CONFIG &= ~BIT(NPCX_I3C_CONFIG_TGTENA);  in npcx_i3c_target_ibi_raise()
2008 		inst->CONFIG |= BIT(NPCX_I3C_CONFIG_TGTENA);  in npcx_i3c_target_ibi_raise()
2055 	i3c_inst->CONFIG &= ~BIT(NPCX_I3C_CONFIG_MATCHSS);  in npcx_i3c_target_disable_mdmafb()
2076 	i3c_inst->CONFIG |= BIT(NPCX_I3C_CONFIG_MATCHSS);  in npcx_i3c_target_enable_mdmafb()
2100 	i3c_inst->CONFIG &= ~BIT(NPCX_I3C_CONFIG_MATCHSS);  in npcx_i3c_target_disable_mdmatb()
2119 	i3c_inst->CONFIG |= BIT(NPCX_I3C_CONFIG_MATCHSS);  in npcx_i3c_target_enable_mdmatb()
2468 	SET_FIELD(inst->CONFIG, NPCX_I3C_CONFIG_BAMATCH, bamatch);  in npcx_i3c_apply_cntlr_config()
2501 	SET_FIELD(inst->CONFIG, NPCX_I3C_CONFIG_BAMATCH, bamatch);  in npcx_i3c_apply_target_config()
2511 		inst->CONFIG |= BIT(NPCX_I3C_CONFIG_IDRAND);  in npcx_i3c_apply_target_config()
2513 		inst->CONFIG &= ~BIT(NPCX_I3C_CONFIG_IDRAND);  in npcx_i3c_apply_target_config()
2526 	SET_FIELD(inst->CONFIG, NPCX_I3C_CONFIG_SADDR, config_target->static_addr);  in npcx_i3c_apply_target_config()
2527 	SET_FIELD(inst->CONFIG, NPCX_I3C_CONFIG_HDRCMD, CFG_HDRCMD_RD_FROM_FIFIO);  in npcx_i3c_apply_target_config()
2533 	inst->CONFIG &= ~BIT(NPCX_I3C_CONFIG_MATCHSS);  in npcx_i3c_apply_target_config()
2560 			inst->CONFIG |= BIT(NPCX_I3C_CONFIG_TGTENA); /* Target mode enable */  in npcx_i3c_dev_init()
2570 		inst->CONFIG |= BIT(NPCX_I3C_CONFIG_TGTENA); /* Target mode enable */  in npcx_i3c_dev_init()
2767 			if (IS_BIT_SET(inst->CONFIG, NPCX_I3C_CONFIG_MATCHSS)) {  in npcx_i3c_target_isr()
2818 		inst->CONFIG &= ~BIT(NPCX_I3C_CONFIG_TGTENA);   /* Disable target mode */  in npcx_i3c_target_isr()
2827 	if (IS_BIT_SET(inst->CONFIG, NPCX_I3C_CONFIG_TGTENA)) {  in npcx_i3c_isr()