Lines Matching full:base
73 I3C_Type *base; member
203 * @param base Pointer to controller registers.
207 static uint32_t mcux_i3c_interrupt_disable(I3C_Type *base) in mcux_i3c_interrupt_disable() argument
209 uint32_t intmask = base->MINTSET; in mcux_i3c_interrupt_disable()
211 base->MINTCLR = intmask; in mcux_i3c_interrupt_disable()
219 * @param base Pointer to controller registers.
223 static void mcux_i3c_interrupt_enable(I3C_Type *base, uint32_t mask) in mcux_i3c_interrupt_enable() argument
225 base->MINTSET = mask; in mcux_i3c_interrupt_enable()
236 static bool mcux_i3c_has_error(I3C_Type *base) in mcux_i3c_has_error() argument
240 mstatus = base->MSTATUS; in mcux_i3c_has_error()
242 merrwarn = base->MERRWARN; in mcux_i3c_has_error()
265 static inline bool mcux_i3c_error_is_timeout(I3C_Type *base) in mcux_i3c_error_is_timeout() argument
267 if (mcux_i3c_has_error(base)) { in mcux_i3c_error_is_timeout()
268 if (reg32_test(&base->MERRWARN, I3C_MERRWARN_TIMEOUT_MASK)) { in mcux_i3c_error_is_timeout()
286 static inline bool mcux_i3c_error_is_nack(I3C_Type *base) in mcux_i3c_error_is_nack() argument
288 if (mcux_i3c_has_error(base)) { in mcux_i3c_error_is_nack()
289 if (reg32_test(&base->MERRWARN, I3C_MERRWARN_NACK_MASK)) { in mcux_i3c_error_is_nack()
300 * @param base Pointer to controller registers.
306 static inline bool mcux_i3c_status_is_set(I3C_Type *base, uint32_t mask) in mcux_i3c_status_is_set() argument
308 return reg32_test(&base->MSTATUS, mask); in mcux_i3c_status_is_set()
316 * @param base Pointer to controller registers.
319 static inline void mcux_i3c_status_wait(I3C_Type *base, uint32_t mask) in mcux_i3c_status_wait() argument
322 while (!mcux_i3c_status_is_set(base, mask)) { in mcux_i3c_status_wait()
330 * @param base Pointer to controller registers.
337 static inline int mcux_i3c_status_wait_timeout(I3C_Type *base, uint32_t mask, in mcux_i3c_status_wait_timeout() argument
340 return reg32_poll_timeout(&base->MSTATUS, mask, mask, timeout_us); in mcux_i3c_status_wait_timeout()
348 * @param base Pointer to controller registers.
351 static inline void mcux_i3c_status_clear(I3C_Type *base, uint32_t mask) in mcux_i3c_status_clear() argument
355 base->MSTATUS = mask; in mcux_i3c_status_clear()
357 if (!mcux_i3c_status_is_set(base, mask)) { in mcux_i3c_status_clear()
375 * @param base Pointer to controller registers.
377 static inline void mcux_i3c_status_clear_all(I3C_Type *base) in mcux_i3c_status_clear_all() argument
384 mcux_i3c_status_clear(base, mask); in mcux_i3c_status_clear_all()
390 * @param base Pointer to controller registers.
397 static inline int mcux_i3c_status_clear_timeout(I3C_Type *base, uint32_t mask, in mcux_i3c_status_clear_timeout() argument
402 base->MSTATUS = mask; in mcux_i3c_status_clear_timeout()
408 result = WAIT_FOR(!mcux_i3c_status_is_set(base, mask), timeout_us, base->MSTATUS = mask); in mcux_i3c_status_clear_timeout()
424 * @param base Pointer to controller registers.
427 static inline void mcux_i3c_status_wait_clear(I3C_Type *base, uint32_t mask) in mcux_i3c_status_wait_clear() argument
429 mcux_i3c_status_wait(base, mask); in mcux_i3c_status_wait_clear()
430 mcux_i3c_status_clear(base, mask); in mcux_i3c_status_wait_clear()
439 * @param base Pointer to controller registers.
446 static inline int mcux_i3c_status_wait_clear_timeout(I3C_Type *base, uint32_t mask, in mcux_i3c_status_wait_clear_timeout() argument
451 ret = mcux_i3c_status_wait_timeout(base, mask, timeout_us); in mcux_i3c_status_wait_clear_timeout()
456 ret = mcux_i3c_status_clear_timeout(base, mask, timeout_us); in mcux_i3c_status_wait_clear_timeout()
465 * @param base Pointer to controller registers.
467 static inline void mcux_i3c_errwarn_clear_all_nowait(I3C_Type *base) in mcux_i3c_errwarn_clear_all_nowait() argument
469 base->MERRWARN = base->MERRWARN; in mcux_i3c_errwarn_clear_all_nowait()
475 * @param base Pointer to controller registers.
477 static inline void mcux_i3c_request_daa(I3C_Type *base) in mcux_i3c_request_daa() argument
479 reg32_update(&base->MCTRL, in mcux_i3c_request_daa()
487 * @param base Pointer to controller registers.
489 static inline void mcux_i3c_request_auto_ibi(I3C_Type *base) in mcux_i3c_request_auto_ibi() argument
491 reg32_update(&base->MCTRL, in mcux_i3c_request_auto_ibi()
496 mcux_i3c_status_wait_clear(base, I3C_MSTATUS_IBIWON_MASK); in mcux_i3c_request_auto_ibi()
502 * @param base Pointer to controller registers.
513 static inline uint32_t mcux_i3c_state_get(I3C_Type *base) in mcux_i3c_state_get() argument
515 uint32_t mstatus = base->MSTATUS; in mcux_i3c_state_get()
527 * @param base Pointer to controller registers.
536 static inline int mcux_i3c_state_wait_timeout(I3C_Type *base, uint32_t state, in mcux_i3c_state_wait_timeout() argument
544 if (mcux_i3c_state_get(base) == state) { in mcux_i3c_state_wait_timeout()
559 * @param base Pointer to controller registers.
561 static inline void mcux_i3c_wait_idle(struct mcux_i3c_data *dev_data, I3C_Type *base) in mcux_i3c_wait_idle() argument
563 while (mcux_i3c_state_get(base) != I3C_MSTATUS_STATE_IDLE) { in mcux_i3c_wait_idle()
573 * @param base Pointer to controller registers.
581 static int mcux_i3c_request_emit_start(I3C_Type *base, uint8_t addr, bool is_i2c, in mcux_i3c_request_emit_start() argument
601 base->MCTRL = mctrl; in mcux_i3c_request_emit_start()
604 ret = mcux_i3c_status_wait_clear_timeout(base, I3C_MSTATUS_MCTRLDONE_MASK, in mcux_i3c_request_emit_start()
608 if (mcux_i3c_error_is_nack(base)) { in mcux_i3c_request_emit_start()
622 * @param base Pointer to controller registers.
626 static inline int mcux_i3c_do_request_emit_stop(I3C_Type *base, bool wait_stop) in mcux_i3c_do_request_emit_stop() argument
628 reg32_update(&base->MCTRL, in mcux_i3c_do_request_emit_stop()
643 while (reg32_test_match(&base->MSTATUS, I3C_MSTATUS_STATE_MASK, in mcux_i3c_do_request_emit_stop()
645 if (mcux_i3c_has_error(base)) { in mcux_i3c_do_request_emit_stop()
652 if (reg32_test(&base->MERRWARN, in mcux_i3c_do_request_emit_stop()
654 mcux_i3c_errwarn_clear_all_nowait(base); in mcux_i3c_do_request_emit_stop()
674 * @param base Pointer to controller registers.
679 I3C_Type *base, bool wait_stop) in mcux_i3c_request_emit_stop() argument
689 if (mcux_i3c_has_error(base)) { in mcux_i3c_request_emit_stop()
690 mcux_i3c_errwarn_clear_all_nowait(base); in mcux_i3c_request_emit_stop()
694 if (!reg32_test_match(&base->MSTATUS, I3C_MSTATUS_STATE_MASK, in mcux_i3c_request_emit_stop()
701 int err = mcux_i3c_do_request_emit_stop(base, wait_stop); in mcux_i3c_request_emit_stop()
728 * @param base Pointer to controller registers.
730 static inline void mcux_i3c_ibi_respond_nack(I3C_Type *base) in mcux_i3c_ibi_respond_nack() argument
732 reg32_update(&base->MCTRL, in mcux_i3c_ibi_respond_nack()
736 mcux_i3c_status_wait_clear(base, I3C_MSTATUS_MCTRLDONE_MASK); in mcux_i3c_ibi_respond_nack()
742 * @param base Pointer to controller registers.
744 static inline void mcux_i3c_ibi_respond_ack(I3C_Type *base) in mcux_i3c_ibi_respond_ack() argument
746 reg32_update(&base->MCTRL, in mcux_i3c_ibi_respond_ack()
750 mcux_i3c_status_wait_clear(base, I3C_MSTATUS_MCTRLDONE_MASK); in mcux_i3c_ibi_respond_ack()
759 * @param base Pointer to controller registers.
763 static inline int mcux_i3c_fifo_rx_count_get(I3C_Type *base) in mcux_i3c_fifo_rx_count_get() argument
765 uint32_t mdatactrl = base->MDATACTRL; in mcux_i3c_fifo_rx_count_get()
773 * @param base Pointer to controller registers.
775 static inline void mcux_i3c_fifo_flush(I3C_Type *base) in mcux_i3c_fifo_flush() argument
777 base->MDATACTRL = I3C_MDATACTRL_FLUSHFB_MASK | I3C_MDATACTRL_FLUSHTB_MASK; in mcux_i3c_fifo_flush()
787 * @param base Pointer to controller registers.
789 static inline void mcux_i3c_xfer_reset(I3C_Type *base) in mcux_i3c_xfer_reset() argument
791 mcux_i3c_status_clear_all(base); in mcux_i3c_xfer_reset()
792 mcux_i3c_errwarn_clear_all_nowait(base); in mcux_i3c_xfer_reset()
793 mcux_i3c_fifo_flush(base); in mcux_i3c_xfer_reset()
804 I3C_Type *base = config->base; in mcux_i3c_fifo_rx_drain() local
808 while (mcux_i3c_status_is_set(base, I3C_MSTATUS_RXPEND_MASK)) { in mcux_i3c_fifo_rx_drain()
809 buf = base->MRDATAB; in mcux_i3c_fifo_rx_drain()
841 I3C_Type *base = config->base; in mcux_i3c_recover_bus() local
849 if (mcux_i3c_state_get(base) == I3C_MSTATUS_STATE_NORMACT) { in mcux_i3c_recover_bus()
850 mcux_i3c_request_emit_stop(dev->data, base, true); in mcux_i3c_recover_bus()
854 while (mcux_i3c_status_is_set(base, I3C_MSTATUS_SLVSTART_MASK)) { in mcux_i3c_recover_bus()
856 mcux_i3c_request_auto_ibi(base); in mcux_i3c_recover_bus()
858 if (mcux_i3c_status_wait_clear_timeout(base, I3C_MSTATUS_COMPLETE_MASK, in mcux_i3c_recover_bus()
874 if (reg32_poll_timeout(&base->MSTATUS, I3C_MSTATUS_STATE_MASK, in mcux_i3c_recover_bus()
888 * @param base Pointer to controller registers.
894 static int mcux_i3c_do_one_xfer_read(I3C_Type *base, uint8_t *buf, uint8_t buf_sz, bool ibi) in mcux_i3c_do_one_xfer_read() argument
906 if (mcux_i3c_fifo_rx_count_get(base) == 0) { in mcux_i3c_do_one_xfer_read()
909 buf[offset++] = (uint8_t)base->MRDATAB; in mcux_i3c_do_one_xfer_read()
915 if (mcux_i3c_has_error(base)) { in mcux_i3c_do_one_xfer_read()
916 if (mcux_i3c_error_is_timeout(base)) { in mcux_i3c_do_one_xfer_read()
920 base->MERRWARN = base->MERRWARN; in mcux_i3c_do_one_xfer_read()
950 * @param base Pointer to controller registers.
957 static int mcux_i3c_do_one_xfer_write(I3C_Type *base, uint8_t *buf, uint8_t buf_sz, bool no_ending) in mcux_i3c_do_one_xfer_write() argument
964 ret = reg32_poll_timeout(&base->MDATACTRL, I3C_MDATACTRL_TXFULL_MASK, 0, 1000); in mcux_i3c_do_one_xfer_write()
970 base->MWDATAB = (uint32_t)buf[offset]; in mcux_i3c_do_one_xfer_write()
972 base->MWDATABE = (uint32_t)buf[offset]; in mcux_i3c_do_one_xfer_write()
988 * @param base Pointer to controller registers.
1001 static int mcux_i3c_do_one_xfer(I3C_Type *base, struct mcux_i3c_data *data, in mcux_i3c_do_one_xfer() argument
1009 mcux_i3c_status_clear_all(base); in mcux_i3c_do_one_xfer()
1010 mcux_i3c_errwarn_clear_all_nowait(base); in mcux_i3c_do_one_xfer()
1014 ret = mcux_i3c_request_emit_start(base, addr, is_i2c, is_read, buf_sz); in mcux_i3c_do_one_xfer()
1027 ret = mcux_i3c_do_one_xfer_read(base, buf, buf_sz, false); in mcux_i3c_do_one_xfer()
1029 ret = mcux_i3c_do_one_xfer_write(base, buf, buf_sz, no_ending); in mcux_i3c_do_one_xfer()
1041 ret = mcux_i3c_status_wait_timeout(base, I3C_MSTATUS_COMPLETE_MASK, 1000); in mcux_i3c_do_one_xfer()
1051 if (mcux_i3c_has_error(base)) { in mcux_i3c_do_one_xfer()
1057 mcux_i3c_request_emit_stop(data, base, true); in mcux_i3c_do_one_xfer()
1082 I3C_Type *base = config->base; in mcux_i3c_transfer() local
1093 mcux_i3c_wait_idle(dev_data, base); in mcux_i3c_transfer()
1095 mcux_i3c_xfer_reset(base); in mcux_i3c_transfer()
1136 ret = mcux_i3c_request_emit_start(base, I3C_BROADCAST_ADDR, in mcux_i3c_transfer()
1141 mcux_i3c_wait_idle(dev_data, base); in mcux_i3c_transfer()
1154 ret = mcux_i3c_do_one_xfer(base, dev_data, target->dynamic_addr, false, in mcux_i3c_transfer()
1173 mcux_i3c_request_emit_stop(dev_data, base, true); in mcux_i3c_transfer()
1174 mcux_i3c_errwarn_clear_all_nowait(base); in mcux_i3c_transfer()
1175 mcux_i3c_status_clear_all(base); in mcux_i3c_transfer()
1196 I3C_Type *base = config->base; in mcux_i3c_do_daa() local
1205 ret = mcux_i3c_state_wait_timeout(base, I3C_MSTATUS_STATE_IDLE, 100, 100000); in mcux_i3c_do_daa()
1213 intmask = mcux_i3c_interrupt_disable(base); in mcux_i3c_do_daa()
1215 mcux_i3c_xfer_reset(base); in mcux_i3c_do_daa()
1218 mcux_i3c_request_daa(base); in mcux_i3c_do_daa()
1224 if (mcux_i3c_has_error(base)) { in mcux_i3c_do_daa()
1232 rx_count = mcux_i3c_fifo_rx_count_get(base); in mcux_i3c_do_daa()
1233 while (mcux_i3c_status_is_set(base, I3C_MSTATUS_RXPEND_MASK) && in mcux_i3c_do_daa()
1235 rx_buf[rx_size] = (uint8_t)(base->MRDATAB & in mcux_i3c_do_daa()
1240 } while (!mcux_i3c_status_is_set(base, I3C_MSTATUS_MCTRLDONE_MASK)); in mcux_i3c_do_daa()
1242 mcux_i3c_status_clear(base, I3C_MSTATUS_MCTRLDONE_MASK); in mcux_i3c_do_daa()
1245 if ((mcux_i3c_state_get(base) == I3C_MSTATUS_STATE_DAA) && in mcux_i3c_do_daa()
1246 (mcux_i3c_status_is_set(base, I3C_MSTATUS_BETWEEN_MASK))) { in mcux_i3c_do_daa()
1296 base->MWDATAB = dyn_addr; in mcux_i3c_do_daa()
1297 mcux_i3c_request_daa(base); in mcux_i3c_do_daa()
1303 } while (!mcux_i3c_status_is_set(base, I3C_MSTATUS_COMPLETE_MASK)); in mcux_i3c_do_daa()
1307 mcux_i3c_errwarn_clear_all_nowait(base); in mcux_i3c_do_daa()
1308 mcux_i3c_status_clear_all(base); in mcux_i3c_do_daa()
1311 mcux_i3c_interrupt_enable(base, intmask); in mcux_i3c_do_daa()
1334 I3C_Type *base = config->base; in mcux_i3c_do_ccc() local
1352 mcux_i3c_xfer_reset(base); in mcux_i3c_do_ccc()
1357 ret = mcux_i3c_request_emit_start(base, I3C_BROADCAST_ADDR, false, false, 0); in mcux_i3c_do_ccc()
1368 mcux_i3c_status_clear_all(base); in mcux_i3c_do_ccc()
1369 mcux_i3c_errwarn_clear_all_nowait(base); in mcux_i3c_do_ccc()
1370 ret = mcux_i3c_do_one_xfer_write(base, &payload->ccc.id, 1, in mcux_i3c_do_ccc()
1383 mcux_i3c_status_clear_all(base); in mcux_i3c_do_ccc()
1384 mcux_i3c_errwarn_clear_all_nowait(base); in mcux_i3c_do_ccc()
1385 ret = mcux_i3c_do_one_xfer_write(base, payload->ccc.data, in mcux_i3c_do_ccc()
1401 ret = mcux_i3c_status_wait_clear_timeout(base, I3C_MSTATUS_COMPLETE_MASK, 1000); in mcux_i3c_do_ccc()
1418 ret = mcux_i3c_do_one_xfer(base, data, in mcux_i3c_do_ccc()
1436 mcux_i3c_request_emit_stop(data, base, true); in mcux_i3c_do_ccc()
1462 I3C_Type *base = config->base; in mcux_i3c_ibi_work() local
1469 if (mcux_i3c_state_get(base) != I3C_MSTATUS_STATE_SLVREQ) { in mcux_i3c_ibi_work()
1472 base->MSTATUS, base->MERRWARN); in mcux_i3c_ibi_work()
1473 mcux_i3c_request_emit_stop(data, base, true); in mcux_i3c_ibi_work()
1479 mcux_i3c_request_auto_ibi(base); in mcux_i3c_ibi_work()
1481 mstatus = sys_read32((mem_addr_t)&base->MSTATUS); in mcux_i3c_ibi_work()
1503 if (mcux_i3c_status_wait_timeout(base, I3C_MSTATUS_COMPLETE_MASK, in mcux_i3c_ibi_work()
1507 mcux_i3c_request_emit_stop(data, base, true); in mcux_i3c_ibi_work()
1521 ret = mcux_i3c_do_one_xfer_read(base, &payload[0], in mcux_i3c_ibi_work()
1528 mcux_i3c_request_emit_stop(data, base, true); in mcux_i3c_ibi_work()
1535 mcux_i3c_ibi_respond_nack(base); in mcux_i3c_ibi_work()
1539 mcux_i3c_ibi_respond_ack(base); in mcux_i3c_ibi_work()
1543 mcux_i3c_ibi_respond_nack(base); in mcux_i3c_ibi_work()
1549 if (mcux_i3c_has_error(base)) { in mcux_i3c_ibi_work()
1555 mcux_i3c_request_emit_stop(data, base, true); in mcux_i3c_ibi_work()
1570 mcux_i3c_request_emit_stop(data, base, true); in mcux_i3c_ibi_work()
1587 base->MINTSET = I3C_MINTSET_SLVSTART_MASK; in mcux_i3c_ibi_work()
1591 I3C_Type *base) in mcux_i3c_ibi_rules_setup() argument
1622 base->MIBIRULES = ibi_rules; in mcux_i3c_ibi_rules_setup()
1632 I3C_Type *base = config->base; in mcux_i3c_ibi_enable() local
1658 base->MINTCLR = I3C_MINTCLR_SLVSTART_MASK; in mcux_i3c_ibi_enable()
1717 mcux_i3c_ibi_rules_setup(data, base); in mcux_i3c_ibi_enable()
1733 base->MINTSET = I3C_MINTSET_SLVSTART_MASK; in mcux_i3c_ibi_enable()
1744 I3C_Type *base = config->base; in mcux_i3c_ibi_disable() local
1767 base->MINTCLR = I3C_MINTCLR_SLVSTART_MASK; in mcux_i3c_ibi_disable()
1780 mcux_i3c_ibi_rules_setup(data, base); in mcux_i3c_ibi_disable()
1787 base->MINTSET = I3C_MINTSET_SLVSTART_MASK; in mcux_i3c_ibi_disable()
1806 I3C_Type *base = config->base; in mcux_i3c_isr() local
1809 if (mcux_i3c_status_is_set(base, I3C_MSTATUS_SLVSTART_MASK)) { in mcux_i3c_isr()
1813 base->MSTATUS = I3C_MSTATUS_SLVSTART_MASK; in mcux_i3c_isr()
1819 base->MINTCLR = I3C_MINTCLR_SLVSTART_MASK; in mcux_i3c_isr()
1827 base->MINTSET = I3C_MINTCLR_SLVSTART_MASK; in mcux_i3c_isr()
1853 I3C_Type *base = dev_cfg->base; in mcux_i3c_configure() local
1900 I3C_MasterInit(base, &master_config, clock_freq); in mcux_i3c_configure()
1952 I3C_Type *base = config->base; in mcux_i3c_init() local
1994 base->MINTCLR = I3C_MINTCLR_SLVSTART_MASK | in mcux_i3c_init()
2032 I3C_Type *base = config->base; in mcux_i3c_i2c_api_transfer() local
2037 mcux_i3c_wait_idle(dev_data, base); in mcux_i3c_i2c_api_transfer()
2039 mcux_i3c_xfer_reset(base); in mcux_i3c_i2c_api_transfer()
2074 ret = mcux_i3c_do_one_xfer(base, dev_data, addr, true, in mcux_i3c_i2c_api_transfer()
2085 mcux_i3c_request_emit_stop(dev_data, base, true); in mcux_i3c_i2c_api_transfer()
2086 mcux_i3c_errwarn_clear_all_nowait(base); in mcux_i3c_i2c_api_transfer()
2087 mcux_i3c_status_clear_all(base); in mcux_i3c_i2c_api_transfer()
2131 .base = (I3C_Type *) DT_INST_REG_ADDR(id), \