Lines Matching +full:i2c +full:- +full:errors
6 * SPDX-License-Identifier: Apache-2.0
129 * @param reg Pointer to 32-bit Register.
135 * @retval -ETIMEDOUT Timedout without matching.
143 * quickly (some sub-microseconds) so no extra in reg32_poll_timeout()
147 return -ETIMEDOUT; in reg32_poll_timeout()
155 * @param reg Pointer to 32-bit Register.
173 * @param reg Pointer to 32-bit register.
190 * @param reg Pointer to 32-bit register.
209 uint32_t intmask = base->MINTSET; in mcux_i3c_interrupt_disable()
211 base->MINTCLR = intmask; in mcux_i3c_interrupt_disable()
225 base->MINTSET = mask; in mcux_i3c_interrupt_enable()
229 * @brief Check if there are any errors.
233 * @retval True if there are any errors.
234 * @retval False if no errors.
240 mstatus = base->MSTATUS; in mcux_i3c_has_error()
242 merrwarn = base->MERRWARN; in mcux_i3c_has_error()
260 * @brief Check if there are any errors, and if one of them is time out error.
268 if (reg32_test(&base->MERRWARN, I3C_MERRWARN_TIMEOUT_MASK)) { in mcux_i3c_error_is_timeout()
277 * @brief Check if there are any errors, and if one of them is NACK.
289 if (reg32_test(&base->MERRWARN, I3C_MERRWARN_NACK_MASK)) { in mcux_i3c_error_is_nack()
308 return reg32_test(&base->MSTATUS, mask); in mcux_i3c_status_is_set()
335 * @retval -ETIMEDOUT
340 return reg32_poll_timeout(&base->MSTATUS, mask, mask, timeout_us); in mcux_i3c_status_wait_timeout()
355 base->MSTATUS = mask; in mcux_i3c_status_clear()
395 * @retval -ETIMEDOUT
402 base->MSTATUS = mask; in mcux_i3c_status_clear_timeout()
408 result = WAIT_FOR(!mcux_i3c_status_is_set(base, mask), timeout_us, base->MSTATUS = mask); in mcux_i3c_status_clear_timeout()
410 return -ETIMEDOUT; in mcux_i3c_status_clear_timeout()
444 * @retval -ETIMEDOUT Timedout without matching.
469 base->MERRWARN = base->MERRWARN; in mcux_i3c_errwarn_clear_all_nowait()
479 reg32_update(&base->MCTRL, in mcux_i3c_request_daa()
491 reg32_update(&base->MCTRL, in mcux_i3c_request_auto_ibi()
515 uint32_t mstatus = base->MSTATUS; in mcux_i3c_state_get()
534 * @retval -ETIMEDOUT Exhausted all delays without matching.
541 int ret = -ETIMEDOUT; in mcux_i3c_state_wait_timeout()
564 k_condvar_wait(&dev_data->condvar, in mcux_i3c_wait_idle()
565 &dev_data->lock, in mcux_i3c_wait_idle()
575 * @param is_i2c True if this is I2C transactions, false if I3C.
601 base->MCTRL = mctrl; in mcux_i3c_request_emit_start()
609 ret = -ENODEV; in mcux_i3c_request_emit_start()
620 * checking for errors.
628 reg32_update(&base->MCTRL, in mcux_i3c_do_request_emit_stop()
643 while (reg32_test_match(&base->MSTATUS, I3C_MSTATUS_STATE_MASK, in mcux_i3c_do_request_emit_stop()
652 if (reg32_test(&base->MERRWARN, in mcux_i3c_do_request_emit_stop()
655 return -ETIMEDOUT; in mcux_i3c_do_request_emit_stop()
657 return -EIO; in mcux_i3c_do_request_emit_stop()
671 * retries if any timeout errors occur during the emit STOP.
694 if (!reg32_test_match(&base->MSTATUS, I3C_MSTATUS_STATE_MASK, in mcux_i3c_request_emit_stop()
704 if ((err == -ETIMEDOUT) && (++retries <= I3C_MAX_STOP_RETRIES)) { in mcux_i3c_request_emit_stop()
722 k_condvar_broadcast(&dev_data->condvar); in mcux_i3c_request_emit_stop()
732 reg32_update(&base->MCTRL, in mcux_i3c_ibi_respond_nack()
746 reg32_update(&base->MCTRL, in mcux_i3c_ibi_respond_ack()
765 uint32_t mdatactrl = base->MDATACTRL; in mcux_i3c_fifo_rx_count_get()
777 base->MDATACTRL = I3C_MDATACTRL_FLUSHFB_MASK | I3C_MDATACTRL_FLUSHTB_MASK; in mcux_i3c_fifo_flush()
803 const struct mcux_i3c_config *config = dev->config; in mcux_i3c_fifo_rx_drain()
804 I3C_Type *base = config->base; in mcux_i3c_fifo_rx_drain()
809 buf = base->MRDATAB; in mcux_i3c_fifo_rx_drain()
828 const struct mcux_i3c_config *config = dev->config; in mcux_i3c_device_find()
830 return i3c_dev_list_find(&config->common.dev_list, id); in mcux_i3c_device_find()
840 const struct mcux_i3c_config *config = dev->config; in mcux_i3c_recover_bus()
841 I3C_Type *base = config->base; in mcux_i3c_recover_bus()
850 mcux_i3c_request_emit_stop(dev->data, base, true); in mcux_i3c_recover_bus()
859 1000) == -ETIMEDOUT) { in mcux_i3c_recover_bus()
874 if (reg32_poll_timeout(&base->MSTATUS, I3C_MSTATUS_STATE_MASK, in mcux_i3c_recover_bus()
875 I3C_MSTATUS_STATE_IDLE, 1000) == -ETIMEDOUT) { in mcux_i3c_recover_bus()
876 ret = -EBUSY; in mcux_i3c_recover_bus()
909 buf[offset++] = (uint8_t)base->MRDATAB; in mcux_i3c_do_one_xfer_read()
917 ret = -ETIMEDOUT; in mcux_i3c_do_one_xfer_read()
920 base->MERRWARN = base->MERRWARN; in mcux_i3c_do_one_xfer_read()
927 if ((ret == -ETIMEDOUT) && ibi && offset) { in mcux_i3c_do_one_xfer_read()
930 if (ret == -ETIMEDOUT) { in mcux_i3c_do_one_xfer_read()
964 ret = reg32_poll_timeout(&base->MDATACTRL, I3C_MDATACTRL_TXFULL_MASK, 0, 1000); in mcux_i3c_do_one_xfer_write()
965 if (ret == -ETIMEDOUT) { in mcux_i3c_do_one_xfer_write()
970 base->MWDATAB = (uint32_t)buf[offset]; in mcux_i3c_do_one_xfer_write()
972 base->MWDATABE = (uint32_t)buf[offset]; in mcux_i3c_do_one_xfer_write()
976 remaining -= 1; in mcux_i3c_do_one_xfer_write()
991 * @param is_i2c True if this is I2C transactions, false if I3C.
1052 ret = -EIO; in mcux_i3c_do_one_xfer()
1080 const struct mcux_i3c_config *config = dev->config; in mcux_i3c_transfer()
1081 struct mcux_i3c_data *dev_data = dev->data; in mcux_i3c_transfer()
1082 I3C_Type *base = config->base; in mcux_i3c_transfer()
1086 if (target->dynamic_addr == 0U) { in mcux_i3c_transfer()
1087 ret = -EINVAL; in mcux_i3c_transfer()
1091 k_mutex_lock(&dev_data->lock, K_FOREVER); in mcux_i3c_transfer()
1138 if (ret == -ENODEV) { in mcux_i3c_transfer()
1154 ret = mcux_i3c_do_one_xfer(base, dev_data, target->dynamic_addr, false, in mcux_i3c_transfer()
1176 k_mutex_unlock(&dev_data->lock); in mcux_i3c_transfer()
1194 const struct mcux_i3c_config *config = dev->config; in mcux_i3c_do_daa()
1195 struct mcux_i3c_data *data = dev->data; in mcux_i3c_do_daa()
1196 I3C_Type *base = config->base; in mcux_i3c_do_daa()
1203 k_mutex_lock(&data->lock, K_FOREVER); in mcux_i3c_do_daa()
1206 if (ret == -ETIMEDOUT) { in mcux_i3c_do_daa()
1227 ret = -EIO; in mcux_i3c_do_daa()
1235 rx_buf[rx_size] = (uint8_t)(base->MRDATAB & in mcux_i3c_do_daa()
1238 rx_count--; in mcux_i3c_do_daa()
1268 ret = i3c_dev_list_daa_addr_helper(&data->common.attached_dev.addr_slots, in mcux_i3c_do_daa()
1269 &config->common.dev_list, pid, in mcux_i3c_do_daa()
1277 target->dynamic_addr = dyn_addr; in mcux_i3c_do_daa()
1278 target->bcr = rx_buf[6]; in mcux_i3c_do_daa()
1279 target->dcr = rx_buf[7]; in mcux_i3c_do_daa()
1282 i3c_addr_slots_mark_i3c(&data->common.attached_dev.addr_slots, dyn_addr); in mcux_i3c_do_daa()
1290 if ((target->static_addr != 0U) && (dyn_addr != target->static_addr)) { in mcux_i3c_do_daa()
1291 i3c_addr_slots_mark_free(&data->common.attached_dev.addr_slots, in mcux_i3c_do_daa()
1296 base->MWDATAB = dyn_addr; in mcux_i3c_do_daa()
1310 /* Re-Enable I3C IRQ sources. */ in mcux_i3c_do_daa()
1314 k_mutex_unlock(&data->lock); in mcux_i3c_do_daa()
1332 const struct mcux_i3c_config *config = dev->config; in mcux_i3c_do_ccc()
1333 struct mcux_i3c_data *data = dev->data; in mcux_i3c_do_ccc()
1334 I3C_Type *base = config->base; in mcux_i3c_do_ccc()
1338 return -EINVAL; in mcux_i3c_do_ccc()
1341 if (config->common.dev_list.num_i3c == 0) { in mcux_i3c_do_ccc()
1344 * we don't get errors doing cmds when there in mcux_i3c_do_ccc()
1350 k_mutex_lock(&data->lock, K_FOREVER); in mcux_i3c_do_ccc()
1354 LOG_DBG("CCC[0x%02x]", payload->ccc.id); in mcux_i3c_do_ccc()
1360 payload->ccc.id, in mcux_i3c_do_ccc()
1370 ret = mcux_i3c_do_one_xfer_write(base, &payload->ccc.id, 1, in mcux_i3c_do_ccc()
1371 payload->ccc.data_len > 0); in mcux_i3c_do_ccc()
1374 payload->ccc.id, in mcux_i3c_do_ccc()
1382 if (payload->ccc.data_len > 0) { in mcux_i3c_do_ccc()
1385 ret = mcux_i3c_do_one_xfer_write(base, payload->ccc.data, in mcux_i3c_do_ccc()
1386 payload->ccc.data_len, false); in mcux_i3c_do_ccc()
1389 payload->ccc.id, in mcux_i3c_do_ccc()
1397 payload->ccc.num_xfer = ret; in mcux_i3c_do_ccc()
1411 for (int idx = 0; idx < payload->targets.num_targets; idx++) { in mcux_i3c_do_ccc()
1413 &payload->targets.payloads[idx]; in mcux_i3c_do_ccc()
1415 bool is_read = tgt_payload->rnw == 1U; in mcux_i3c_do_ccc()
1419 tgt_payload->addr, false, in mcux_i3c_do_ccc()
1420 tgt_payload->data, in mcux_i3c_do_ccc()
1421 tgt_payload->data_len, in mcux_i3c_do_ccc()
1425 payload->ccc.id, ret); in mcux_i3c_do_ccc()
1431 tgt_payload->num_xfer = ret; in mcux_i3c_do_ccc()
1442 k_mutex_unlock(&data->lock); in mcux_i3c_do_ccc()
1459 const struct device *dev = i3c_ibi_work->controller; in mcux_i3c_ibi_work()
1460 const struct mcux_i3c_config *config = dev->config; in mcux_i3c_ibi_work()
1461 struct mcux_i3c_data *data = dev->data; in mcux_i3c_ibi_work()
1462 I3C_Type *base = config->base; in mcux_i3c_ibi_work()
1467 k_mutex_lock(&data->lock, K_FOREVER); in mcux_i3c_ibi_work()
1472 base->MSTATUS, base->MERRWARN); in mcux_i3c_ibi_work()
1481 mstatus = sys_read32((mem_addr_t)&base->MSTATUS); in mcux_i3c_ibi_work()
1492 * has finished for hot-join and controller role request. in mcux_i3c_ibi_work()
1504 1000) == -ETIMEDOUT) { in mcux_i3c_ibi_work()
1551 * If the controller detects any errors, simply in mcux_i3c_ibi_work()
1584 k_mutex_unlock(&data->lock); in mcux_i3c_ibi_work()
1586 /* Re-enable target initiated IBI interrupt. */ in mcux_i3c_ibi_work()
1587 base->MINTSET = I3C_MINTSET_SLVSTART_MASK; in mcux_i3c_ibi_work()
1598 for (idx = 0; idx < ARRAY_SIZE(data->ibi.addr); idx++) { in mcux_i3c_ibi_rules_setup()
1601 /* Extract the lower 6-bit of target address */ in mcux_i3c_ibi_rules_setup()
1602 addr_6bit = (uint32_t)data->ibi.addr[idx] & I3C_MIBIRULES_ADDR0_MASK; in mcux_i3c_ibi_rules_setup()
1611 if (!data->ibi.msb) { in mcux_i3c_ibi_rules_setup()
1616 if (!data->ibi.has_mandatory_byte) { in mcux_i3c_ibi_rules_setup()
1622 base->MIBIRULES = ibi_rules; in mcux_i3c_ibi_rules_setup()
1630 const struct mcux_i3c_config *config = dev->config; in mcux_i3c_ibi_enable()
1631 struct mcux_i3c_data *data = dev->data; in mcux_i3c_ibi_enable()
1632 I3C_Type *base = config->base; in mcux_i3c_ibi_enable()
1639 ret = -EINVAL; in mcux_i3c_ibi_enable()
1643 if (data->ibi.num_addr >= ARRAY_SIZE(data->ibi.addr)) { in mcux_i3c_ibi_enable()
1645 ret = -ENOMEM; in mcux_i3c_ibi_enable()
1650 for (idx = 0; idx < ARRAY_SIZE(data->ibi.addr); idx++) { in mcux_i3c_ibi_enable()
1651 if (data->ibi.addr[idx] == target->dynamic_addr) { in mcux_i3c_ibi_enable()
1652 ret = -EINVAL; in mcux_i3c_ibi_enable()
1658 base->MINTCLR = I3C_MINTCLR_SLVSTART_MASK; in mcux_i3c_ibi_enable()
1661 target->dynamic_addr, target->bcr); in mcux_i3c_ibi_enable()
1663 msb = (target->dynamic_addr & BIT(6)) == BIT(6); in mcux_i3c_ibi_enable()
1671 if (data->ibi.num_addr > 0) { in mcux_i3c_ibi_enable()
1676 * 2. Each address in entry only captures the lowest 6-bit. in mcux_i3c_ibi_enable()
1680 if (has_mandatory_byte != data->ibi.has_mandatory_byte) { in mcux_i3c_ibi_enable()
1683 ret = -EINVAL; in mcux_i3c_ibi_enable()
1686 if (msb != data->ibi.msb) { in mcux_i3c_ibi_enable()
1688 ret = -EINVAL; in mcux_i3c_ibi_enable()
1693 for (idx = 0; idx < ARRAY_SIZE(data->ibi.addr); idx++) { in mcux_i3c_ibi_enable()
1694 if (data->ibi.addr[idx] == 0U) { in mcux_i3c_ibi_enable()
1698 if (idx >= ARRAY_SIZE(data->ibi.addr)) { in mcux_i3c_ibi_enable()
1700 ret = -ENOTSUP; in mcux_i3c_ibi_enable()
1708 data->ibi.has_mandatory_byte = has_mandatory_byte; in mcux_i3c_ibi_enable()
1709 data->ibi.msb = msb; in mcux_i3c_ibi_enable()
1714 data->ibi.addr[idx] = target->dynamic_addr; in mcux_i3c_ibi_enable()
1715 data->ibi.num_addr += 1U; in mcux_i3c_ibi_enable()
1724 target->dynamic_addr, ret); in mcux_i3c_ibi_enable()
1728 if (data->ibi.num_addr > 0U) { in mcux_i3c_ibi_enable()
1733 base->MINTSET = I3C_MINTSET_SLVSTART_MASK; in mcux_i3c_ibi_enable()
1742 const struct mcux_i3c_config *config = dev->config; in mcux_i3c_ibi_disable()
1743 struct mcux_i3c_data *data = dev->data; in mcux_i3c_ibi_disable()
1744 I3C_Type *base = config->base; in mcux_i3c_ibi_disable()
1750 ret = -EINVAL; in mcux_i3c_ibi_disable()
1754 for (idx = 0; idx < ARRAY_SIZE(data->ibi.addr); idx++) { in mcux_i3c_ibi_disable()
1755 if (target->dynamic_addr == data->ibi.addr[idx]) { in mcux_i3c_ibi_disable()
1760 if (idx == ARRAY_SIZE(data->ibi.addr)) { in mcux_i3c_ibi_disable()
1762 ret = -ENODEV; in mcux_i3c_ibi_disable()
1767 base->MINTCLR = I3C_MINTCLR_SLVSTART_MASK; in mcux_i3c_ibi_disable()
1769 data->ibi.addr[idx] = 0U; in mcux_i3c_ibi_disable()
1770 data->ibi.num_addr -= 1U; in mcux_i3c_ibi_disable()
1777 target->dynamic_addr, ret); in mcux_i3c_ibi_disable()
1782 if (data->ibi.num_addr > 0U) { in mcux_i3c_ibi_disable()
1787 base->MINTSET = I3C_MINTSET_SLVSTART_MASK; in mcux_i3c_ibi_disable()
1805 const struct mcux_i3c_config *config = dev->config; in mcux_i3c_isr()
1806 I3C_Type *base = config->base; in mcux_i3c_isr()
1813 base->MSTATUS = I3C_MSTATUS_SLVSTART_MASK; in mcux_i3c_isr()
1819 base->MINTCLR = I3C_MINTCLR_SLVSTART_MASK; in mcux_i3c_isr()
1827 base->MINTSET = I3C_MINTCLR_SLVSTART_MASK; in mcux_i3c_isr()
1844 * @retval -EINVAL If invalid configure parameters.
1845 * @retval -EIO General Input/Output errors.
1846 * @retval -ENOSYS If not implemented.
1851 const struct mcux_i3c_config *dev_cfg = dev->config; in mcux_i3c_configure()
1852 struct mcux_i3c_data *dev_data = dev->data; in mcux_i3c_configure()
1853 I3C_Type *base = dev_cfg->base; in mcux_i3c_configure()
1860 ret = -EINVAL; in mcux_i3c_configure()
1869 if ((ctrl_cfg->is_secondary) || in mcux_i3c_configure()
1870 (ctrl_cfg->scl.i2c == 0U) || in mcux_i3c_configure()
1871 (ctrl_cfg->scl.i3c == 0U)) { in mcux_i3c_configure()
1872 ret = -EINVAL; in mcux_i3c_configure()
1877 if (clock_control_get_rate(dev_cfg->clock_dev, dev_cfg->clock_subsys, in mcux_i3c_configure()
1879 ret = -EINVAL; in mcux_i3c_configure()
1887 (void)memcpy(&dev_data->common.ctrl_config, ctrl_cfg, sizeof(*ctrl_cfg)); in mcux_i3c_configure()
1891 master_config.baudRate_Hz.i2cBaud = ctrl_cfg->scl.i2c; in mcux_i3c_configure()
1892 master_config.baudRate_Hz.i3cPushPullBaud = ctrl_cfg->scl.i3c; in mcux_i3c_configure()
1893 master_config.enableOpenDrainHigh = dev_cfg->disable_open_drain_high_pp ? false : true; in mcux_i3c_configure()
1895 if (dev_data->i3c_od_scl_hz) { in mcux_i3c_configure()
1896 master_config.baudRate_Hz.i3cOpenDrainBaud = dev_data->i3c_od_scl_hz; in mcux_i3c_configure()
1923 * @retval -EIO General Input/Output errors.
1924 * @retval -ENOSYS If not implemented.
1929 struct mcux_i3c_data *data = dev->data; in mcux_i3c_config_get()
1933 ret = -EINVAL; in mcux_i3c_config_get()
1937 (void)memcpy(config, &data->common.ctrl_config, sizeof(data->common.ctrl_config)); in mcux_i3c_config_get()
1950 const struct mcux_i3c_config *config = dev->config; in mcux_i3c_init()
1951 struct mcux_i3c_data *data = dev->data; in mcux_i3c_init()
1952 I3C_Type *base = config->base; in mcux_i3c_init()
1953 struct i3c_config_controller *ctrl_config = &data->common.ctrl_config; in mcux_i3c_init()
1962 ret = pinctrl_apply_state(config->pincfg, PINCTRL_STATE_DEFAULT); in mcux_i3c_init()
1967 k_mutex_init(&data->lock); in mcux_i3c_init()
1968 k_condvar_init(&data->condvar); in mcux_i3c_init()
1973 if (ctrl_config->scl.i2c == 0U) { in mcux_i3c_init()
1974 ctrl_config->scl.i2c = ctrl_config_hal.baudRate_Hz.i2cBaud; in mcux_i3c_init()
1977 if (ctrl_config->scl.i3c == 0U) { in mcux_i3c_init()
1978 ctrl_config->scl.i3c = ctrl_config_hal.baudRate_Hz.i3cPushPullBaud; in mcux_i3c_init()
1982 ctrl_config->is_secondary = false; in mcux_i3c_init()
1985 ctrl_config->supported_hdr = 0U; in mcux_i3c_init()
1989 ret = -EINVAL; in mcux_i3c_init()
1994 base->MINTCLR = I3C_MINTCLR_SLVSTART_MASK | in mcux_i3c_init()
2006 ret = -EIO; in mcux_i3c_init()
2011 config->irq_config_func(dev); in mcux_i3c_init()
2014 ret = i3c_bus_init(dev, &config->common.dev_list); in mcux_i3c_init()
2022 return -ENOSYS; in mcux_i3c_i2c_api_configure()
2030 const struct mcux_i3c_config *config = dev->config; in mcux_i3c_i2c_api_transfer()
2031 struct mcux_i3c_data *dev_data = dev->data; in mcux_i3c_i2c_api_transfer()
2032 I3C_Type *base = config->base; in mcux_i3c_i2c_api_transfer()
2035 k_mutex_lock(&dev_data->lock, K_FOREVER); in mcux_i3c_i2c_api_transfer()
2088 k_mutex_unlock(&dev_data->lock); in mcux_i3c_i2c_api_transfer()
2138 .common.dev_list.i2c = mcux_i3c_i2c_device_array_##id, \
2147 .common.ctrl_config.scl.i2c = DT_INST_PROP_OR(id, i2c_scl_hz, 0), \