45 	sys_write32(SOFTR_KEY, config->base + REG_SOFTR);  in i2c_xilinx_axi_reinit()
46 	sys_write32(CR_TX_FIFO_RST, config->base + REG_CR);  in i2c_xilinx_axi_reinit()
47 	sys_write32(CR_EN, config->base + REG_CR);  in i2c_xilinx_axi_reinit()
48 	sys_write32(GIE_ENABLE, config->base + REG_GIE);  in i2c_xilinx_axi_reinit()
62 	sys_write32(ISR_ADDR_TARGET, config->base + REG_IER);  in i2c_xilinx_axi_target_setup()
63 	sys_write32(cfg->address << 1, config->base + REG_ADR);  in i2c_xilinx_axi_target_setup()
64 	sys_write32(0, config->base + REG_RX_FIFO_PIRQ);  in i2c_xilinx_axi_target_setup()
120 	sys_write32(0, config->base + REG_ADR);  in i2c_xilinx_axi_target_unregister()
122 	sys_write32(CR_EN, config->base + REG_CR);  in i2c_xilinx_axi_target_unregister()
125 	sys_write32(int_enable, config->base + REG_IER);  in i2c_xilinx_axi_target_unregister()
158 			sys_write32(read_byte, config->base + REG_TX_FIFO);  in i2c_xilinx_axi_target_isr()
167 				sys_write32(cr, config->base + REG_CR);  in i2c_xilinx_axi_target_isr()
177 		sys_write32(CR_EN, config->base + REG_CR);  in i2c_xilinx_axi_target_isr()
193 			sys_write32(cr, config->base + REG_CR);  in i2c_xilinx_axi_target_isr()
213 		sys_write32(read_byte, config->base + REG_TX_FIFO);  in i2c_xilinx_axi_target_isr()
234 		sys_write32(cr, config->base + REG_CR);  in i2c_xilinx_axi_isr()
245 	sys_write32(int_enable & ~int_status, config->base + REG_IER);  in i2c_xilinx_axi_isr()
247 	sys_write32(ints_to_clear & sys_read32(config->base + REG_ISR), config->base + REG_ISR);  in i2c_xilinx_axi_isr()
272 	sys_write32(int_enable, config->base + REG_IER);  in i2c_xilinx_axi_wait_interrupt()
293 		sys_write32(int_status & int_mask, config->base + REG_ISR);  in i2c_xilinx_axi_clear_interrupt()
356 	sys_write32(0, config->base + REG_RX_FIFO_PIRQ);  in i2c_xilinx_axi_read_nondyn()
361 		sys_write32(cr, config->base + REG_CR);  in i2c_xilinx_axi_read_nondyn()
362 		sys_write32((addr << 1) | I2C_MSG_READ, config->base + REG_TX_FIFO);  in i2c_xilinx_axi_read_nondyn()
364 		sys_write32((addr << 1) | I2C_MSG_READ, config->base + REG_TX_FIFO);  in i2c_xilinx_axi_read_nondyn()
365 		sys_write32(cr, config->base + REG_CR);  in i2c_xilinx_axi_read_nondyn()
383 		sys_write32(cr, config->base + REG_CR);  in i2c_xilinx_axi_read_nondyn()
407 	sys_write32(cr, config->base + REG_CR);  in i2c_xilinx_axi_read_dyn()
412 	sys_write32(bytes_to_read - 1, config->base + REG_RX_FIFO_PIRQ);  in i2c_xilinx_axi_read_dyn()
413 	sys_write32((addr << 1) | I2C_MSG_READ | TX_FIFO_START, config->base + REG_TX_FIFO);  in i2c_xilinx_axi_read_dyn()
418 	sys_write32(len_word, config->base + REG_TX_FIFO);  in i2c_xilinx_axi_read_dyn()
428 		sys_write32(bytes_to_read - 1, config->base + REG_RX_FIFO_PIRQ);  in i2c_xilinx_axi_read_dyn()
494 	sys_write32(cr, config->base + REG_CR);  in i2c_xilinx_axi_write()
495 	sys_write32((addr << 1) | TX_FIFO_START, config->base + REG_TX_FIFO);  in i2c_xilinx_axi_write()
520 			sys_write32(write_word, config->base + REG_TX_FIFO);  in i2c_xilinx_axi_write()