4  * SPDX-License-Identifier: Apache-2.0
63 		dev->data)->ctx;  in max32_configure()
71 	const struct max32_i2c_config *const cfg = dev->config;  in max32_do_configure()
72 	mxc_i2c_regs_t *i2c = cfg->regs;  in max32_do_configure()
79 	case I2C_SPEED_FAST: /** I2C Fast Speed: 400 kHz */  in max32_do_configure()
84 	case I2C_SPEED_FAST_PLUS: /** I2C Fast Plus Speed: 1 MHz */  in max32_do_configure()
97 		return -ENOTSUP;  in max32_do_configure()
109 	const struct max32_i2c_config *const cfg = dev->config;  in max32_msg_start()
110 	struct max32_i2c_data *data = dev->data;  in max32_msg_start()
111 	mxc_i2c_regs_t *i2c = cfg->regs;  in max32_msg_start()
112 	mxc_i2c_req_t *req = &data->req;  in max32_msg_start()
115 	req->i2c = i2c;  in max32_msg_start()
116 	req->addr = i2c_addr;  in max32_msg_start()
118 	if (data->second_msg_flag == 0) {  in max32_msg_start()
128 		req->rx_buf = (unsigned char *)buf;  in max32_msg_start()
129 		req->rx_len = buf_len;  in max32_msg_start()
130 		req->tx_buf = NULL;  in max32_msg_start()
131 		req->tx_len = 0;  in max32_msg_start()
134 		req->tx_buf = (unsigned char *)buf;  in max32_msg_start()
135 		req->tx_len = buf_len;  in max32_msg_start()
136 		req->rx_buf = NULL;  in max32_msg_start()
137 		req->rx_len = 0;  in max32_msg_start()
140 	data->flags = flags;  in max32_msg_start()
141 	data->readb = 0;  in max32_msg_start()
142 	data->written = 0;  in max32_msg_start()
143 	data->err = 0;  in max32_msg_start()
147 	Wrap_MXC_I2C_SetRxCount(i2c, req->rx_len);  in max32_msg_start()
148 	if ((data->flags & I2C_MSG_RESTART)) {  in max32_msg_start()
154 		if (req->tx_len) {  in max32_msg_start()
155 			data->written = MXC_I2C_WriteTXFIFO(i2c, req->tx_buf, 1);  in max32_msg_start()
162 	if (data->err) {  in max32_msg_start()
164 		ret = data->err;  in max32_msg_start()
174 		dev->data)->ctx;  in max32_transfer()
175 	((struct max32_i2c_data *)dev->data)->second_msg_flag = 0;  in max32_transfer()
184 	struct max32_i2c_data *data = dev->data;  in i2c_max32_isr_controller()
185 	mxc_i2c_req_t *req = &data->req;  in i2c_max32_isr_controller()
191 	written = data->written;  in i2c_max32_isr_controller()
192 	readb = data->readb;  in i2c_max32_isr_controller()
200 		data->err = -EIO;  in i2c_max32_isr_controller()
207 		if (written < req->tx_len) {  in i2c_max32_isr_controller()
209 		} else if (readb < req->rx_len) {  in i2c_max32_isr_controller()
215 	if (req->tx_len &&  in i2c_max32_isr_controller()
217 		if (written < req->tx_len) {  in i2c_max32_isr_controller()
218 			written += MXC_I2C_WriteTXFIFO(i2c, &req->tx_buf[written],  in i2c_max32_isr_controller()
219 						       req->tx_len - written);  in i2c_max32_isr_controller()
224 				if (data->flags & I2C_MSG_STOP) {  in i2c_max32_isr_controller()
239 		readb += MXC_I2C_ReadRXFIFO(i2c, &req->rx_buf[readb], req->rx_len - readb);  in i2c_max32_isr_controller()
240 		if (readb == req->rx_len) {  in i2c_max32_isr_controller()
242 			if (data->flags & I2C_MSG_STOP) {  in i2c_max32_isr_controller()
256 			Wrap_MXC_I2C_SetRxCount(i2c, req->rx_len - readb);  in i2c_max32_isr_controller()
258 			i2c->fifo = (req->addr << 1) | 0x1;  in i2c_max32_isr_controller()
262 	data->written = written;  in i2c_max32_isr_controller()
263 	data->readb = readb;  in i2c_max32_isr_controller()
273 	struct max32_i2c_data *data = dev->data;  in max32_start()
274 	struct i2c_rtio *ctx = data->ctx;  in max32_start()
275 	struct rtio_sqe *sqe = &ctx->txn_curr->sqe;  in max32_start()
276 	struct i2c_dt_spec *dt_spec = sqe->iodev->data;  in max32_start()
279 	switch (sqe->op) {  in max32_start()
281 		return max32_msg_start(dev, I2C_MSG_READ | sqe->iodev_flags,  in max32_start()
282 					    sqe->rx.buf, sqe->rx.buf_len, dt_spec->addr);  in max32_start()
284 		data->second_msg_flag = 0;  in max32_start()
285 		return max32_msg_start(dev, I2C_MSG_WRITE | sqe->iodev_flags,  in max32_start()
286 					    (uint8_t *)sqe->tiny_tx.buf, sqe->tiny_tx.buf_len,  in max32_start()
287 					    dt_spec->addr);  in max32_start()
289 		return max32_msg_start(dev, I2C_MSG_WRITE | sqe->iodev_flags,  in max32_start()
290 					    (uint8_t *)sqe->tx.buf, sqe->tx.buf_len,  in max32_start()
291 					    dt_spec->addr);  in max32_start()
293 		res = max32_do_configure(dev, sqe->i2c_config);  in max32_start()
294 		return i2c_rtio_complete(data->ctx, res);  in max32_start()
296 		LOG_ERR("Invalid op code %d for submission %p\n", sqe->op, (void *)sqe);  in max32_start()
297 		return i2c_rtio_complete(data->ctx, -EINVAL);  in max32_start()
303 	struct max32_i2c_data *data = dev->data;  in max32_complete()
304 	struct i2c_rtio *const ctx = data->ctx;  in max32_complete()
305 	const struct max32_i2c_config *const cfg = dev->config;  in max32_complete()
308 	if (cfg->regs->clkhi == I2C_STANDAR_BITRATE_CLKHI) {  in max32_complete()
316 		 * delay. This doesn't happen when using Fast  in max32_complete()
323 		data->second_msg_flag = 1;  in max32_complete()
330 	struct max32_i2c_data *data = dev->data;  in max32_submit()
331 	struct i2c_rtio *const ctx = data->ctx;  in max32_submit()
341 	const struct max32_i2c_config *cfg = dev->config;  in i2c_max32_isr()
342 	struct max32_i2c_data *data = dev->data;  in i2c_max32_isr()
343 	mxc_i2c_regs_t *i2c = cfg->regs;  in i2c_max32_isr()
345 	if (data->target_mode == 0) {  in i2c_max32_isr()
353 	const struct max32_i2c_config *const cfg = dev->config;  in i2c_max32_init()
354 	struct max32_i2c_data *data = dev->data;  in i2c_max32_init()
355 	mxc_i2c_regs_t *i2c = cfg->regs;  in i2c_max32_init()
358 	if (!device_is_ready(cfg->clock)) {  in i2c_max32_init()
359 		return -ENODEV;  in i2c_max32_init()
364 	ret = clock_control_on(cfg->clock, (clock_control_subsys_t)&cfg->perclk);  in i2c_max32_init()
369 	ret = pinctrl_apply_state(cfg->pctrl, PINCTRL_STATE_DEFAULT);  in i2c_max32_init()
379 	MXC_I2C_SetFrequency(i2c, cfg->bitrate);  in i2c_max32_init()
382 	cfg->irq_config_func(dev);  in i2c_max32_init()
386 	irq_enable(cfg->irqn);  in i2c_max32_init()
390 	data->dev = dev;  in i2c_max32_init()
392 	i2c_rtio_init(data->ctx, dev);  in i2c_max32_init()