Lines Matching +full:data +full:- +full:timeout
2 * Copyright (c) 2017, I-SENSE group of ICCS
5 * SPDX-License-Identifier: Apache-2.0
25 #include "i2c-priv.h"
50 const struct i2c_stm32_config *cfg = dev->config; in stm32_i2c_disable_transfer_interrupts()
51 struct i2c_stm32_data *data = dev->data; in stm32_i2c_disable_transfer_interrupts() local
52 I2C_TypeDef *i2c = cfg->i2c; in stm32_i2c_disable_transfer_interrupts()
59 if (!data->smbalert_active) { in stm32_i2c_disable_transfer_interrupts()
66 const struct i2c_stm32_config *cfg = dev->config; in stm32_i2c_enable_transfer_interrupts()
67 I2C_TypeDef *i2c = cfg->i2c; in stm32_i2c_enable_transfer_interrupts()
78 const struct i2c_stm32_config *cfg = dev->config; in stm32_i2c_reset()
79 I2C_TypeDef *i2c = cfg->i2c; in stm32_i2c_reset()
124 const struct i2c_stm32_config *cfg = dev->config; in stm32_i2c_master_finish()
125 struct i2c_stm32_data *data = dev->data; in stm32_i2c_master_finish() local
126 I2C_TypeDef *i2c = cfg->i2c; in stm32_i2c_master_finish()
133 data->master_active = false; in stm32_i2c_master_finish()
134 if (!data->slave_attached && !data->smbalert_active) { in stm32_i2c_master_finish()
141 if (!data->smbalert_active) { in stm32_i2c_master_finish()
151 const struct i2c_stm32_config *cfg = dev->config; in msg_init()
152 struct i2c_stm32_data *data = dev->data; in msg_init() local
153 I2C_TypeDef *i2c = cfg->i2c; in msg_init()
158 k_sem_reset(&data->device_sync_sem); in msg_init()
161 data->current.len = msg->len; in msg_init()
162 data->current.buf = msg->buf; in msg_init()
163 data->current.flags = msg->flags; in msg_init()
164 data->current.is_restart = 0U; in msg_init()
165 data->current.is_write = (transfer == I2C_REQUEST_WRITE); in msg_init()
166 data->current.is_arlo = 0U; in msg_init()
167 data->current.is_err = 0U; in msg_init()
168 data->current.is_nack = 0U; in msg_init()
169 data->current.msg = msg; in msg_init()
171 data->master_active = true; in msg_init()
173 data->slave_address = slave; in msg_init()
179 if (msg->flags & I2C_MSG_RESTART) { in msg_init()
187 struct i2c_stm32_data *data = dev->data; in msg_end() local
189 if (data->current.is_nack || data->current.is_err || in msg_end()
190 data->current.is_arlo) { in msg_end()
201 if (data->current.is_arlo) { in msg_end()
203 data->current.is_arlo); in msg_end()
204 data->current.is_arlo = 0U; in msg_end()
207 if (data->current.is_nack) { in msg_end()
209 data->current.is_nack = 0U; in msg_end()
212 if (data->current.is_err) { in msg_end()
214 data->current.is_err); in msg_end()
215 data->current.is_err = 0U; in msg_end()
219 return -EIO; in msg_end()
226 struct i2c_stm32_data *data = dev->data; in stm32_i2c_master_mode_end() local
228 k_sem_give(&data->device_sync_sem); in stm32_i2c_master_mode_end()
233 const struct i2c_stm32_config *cfg = dev->config; in handle_sb()
234 struct i2c_stm32_data *data = dev->data; in handle_sb() local
235 I2C_TypeDef *i2c = cfg->i2c; in handle_sb()
237 uint16_t saddr = data->slave_address; in handle_sb()
240 if (I2C_ADDR_10_BITS & data->dev_config) { in handle_sb()
244 if (data->current.is_restart == 0U) { in handle_sb()
245 data->current.is_restart = 1U; in handle_sb()
248 data->current.is_restart = 0U; in handle_sb()
255 if (data->current.is_write) { in handle_sb()
259 if (data->current.len == 2) { in handle_sb()
267 const struct i2c_stm32_config *cfg = dev->config; in handle_addr()
268 struct i2c_stm32_data *data = dev->data; in handle_addr() local
269 I2C_TypeDef *i2c = cfg->i2c; in handle_addr()
271 if (I2C_ADDR_10_BITS & data->dev_config) { in handle_addr()
272 if (!data->current.is_write && data->current.is_restart) { in handle_addr()
273 data->current.is_restart = 0U; in handle_addr()
281 if (data->current.is_write) { in handle_addr()
289 if (data->current.len == 0U && IS_ENABLED(CONFIG_SOC_SERIES_STM32F1X)) { in handle_addr()
291 } else if (data->current.len == 1U) { in handle_addr()
298 } else if (data->current.len == 2U) { in handle_addr()
302 /* 2-byte reception: enable NACK and set POS */ in handle_addr()
311 const struct i2c_stm32_config *cfg = dev->config; in handle_txe()
312 struct i2c_stm32_data *data = dev->data; in handle_txe() local
313 I2C_TypeDef *i2c = cfg->i2c; in handle_txe()
315 if (data->current.len) { in handle_txe()
316 data->current.len--; in handle_txe()
317 if (data->current.len == 0U) { in handle_txe()
324 LL_I2C_TransmitData8(i2c, *data->current.buf); in handle_txe()
325 data->current.buf++; in handle_txe()
327 if (data->current.flags & I2C_MSG_STOP) { in handle_txe()
335 k_sem_give(&data->device_sync_sem); in handle_txe()
341 const struct i2c_stm32_config *cfg = dev->config; in handle_rxne()
342 struct i2c_stm32_data *data = dev->data; in handle_rxne() local
343 I2C_TypeDef *i2c = cfg->i2c; in handle_rxne()
345 if (data->current.len > 0) { in handle_rxne()
346 switch (data->current.len) { in handle_rxne()
351 if (data->current.flags & I2C_MSG_STOP) { in handle_rxne()
355 data->current.len--; in handle_rxne()
356 *data->current.buf = LL_I2C_ReceiveData8(i2c); in handle_rxne()
357 data->current.buf++; in handle_rxne()
359 k_sem_give(&data->device_sync_sem); in handle_rxne()
363 * 2-byte reception for N > 3 has already set the NACK in handle_rxne()
367 if (data->current.msg->len > 2) { in handle_rxne()
375 * 2-byte, 3-byte reception and for N-2, N-1, in handle_rxne()
382 data->current.len--; in handle_rxne()
383 *data->current.buf = LL_I2C_ReceiveData8(i2c); in handle_rxne()
384 data->current.buf++; in handle_rxne()
388 if (data->current.flags & I2C_MSG_STOP) { in handle_rxne()
391 k_sem_give(&data->device_sync_sem); in handle_rxne()
397 const struct i2c_stm32_config *cfg = dev->config; in handle_btf()
398 struct i2c_stm32_data *data = dev->data; in handle_btf() local
399 I2C_TypeDef *i2c = cfg->i2c; in handle_btf()
401 if (data->current.is_write) { in handle_btf()
406 switch (data->current.len) { in handle_btf()
412 if (data->current.flags & I2C_MSG_STOP) { in handle_btf()
416 for (counter = 2U; counter > 0; counter--) { in handle_btf()
417 data->current.len--; in handle_btf()
418 *data->current.buf = LL_I2C_ReceiveData8(i2c); in handle_btf()
419 data->current.buf++; in handle_btf()
421 k_sem_give(&data->device_sync_sem); in handle_btf()
424 /* Set NACK before reading N-2 byte*/ in handle_btf()
426 data->current.len--; in handle_btf()
427 *data->current.buf = LL_I2C_ReceiveData8(i2c); in handle_btf()
428 data->current.buf++; in handle_btf()
440 const struct i2c_stm32_config *cfg = dev->config; in stm32_i2c_slave_event()
441 struct i2c_stm32_data *data = dev->data; in stm32_i2c_slave_event() local
442 I2C_TypeDef *i2c = cfg->i2c; in stm32_i2c_slave_event()
444 data->slave_cfg->callbacks; in stm32_i2c_slave_event()
448 slave_cb->read_processed(data->slave_cfg, &val); in stm32_i2c_slave_event()
455 if (slave_cb->write_received(data->slave_cfg, val)) { in stm32_i2c_slave_event()
467 slave_cb->stop(data->slave_cfg); in stm32_i2c_slave_event()
475 slave_cb->write_requested(data->slave_cfg); in stm32_i2c_slave_event()
479 slave_cb->read_requested(data->slave_cfg, &val); in stm32_i2c_slave_event()
491 const struct i2c_stm32_config *cfg = dev->config; in i2c_stm32_target_register()
492 struct i2c_stm32_data *data = dev->data; in i2c_stm32_target_register() local
493 I2C_TypeDef *i2c = cfg->i2c; in i2c_stm32_target_register()
498 return -EINVAL; in i2c_stm32_target_register()
501 if (data->slave_attached) { in i2c_stm32_target_register()
502 return -EBUSY; in i2c_stm32_target_register()
505 if (data->master_active) { in i2c_stm32_target_register()
506 return -EBUSY; in i2c_stm32_target_register()
509 bitrate_cfg = i2c_map_dt_bitrate(cfg->bitrate); in i2c_stm32_target_register()
517 data->slave_cfg = config; in i2c_stm32_target_register()
521 if (data->slave_cfg->flags == I2C_TARGET_FLAGS_ADDR_10_BITS) { in i2c_stm32_target_register()
522 return -ENOTSUP; in i2c_stm32_target_register()
524 LL_I2C_SetOwnAddress1(i2c, config->address << 1U, LL_I2C_OWNADDRESS1_7BIT); in i2c_stm32_target_register()
525 data->slave_attached = true; in i2c_stm32_target_register()
537 const struct i2c_stm32_config *cfg = dev->config; in i2c_stm32_target_unregister()
538 struct i2c_stm32_data *data = dev->data; in i2c_stm32_target_unregister() local
539 I2C_TypeDef *i2c = cfg->i2c; in i2c_stm32_target_unregister()
541 if (!data->slave_attached) { in i2c_stm32_target_unregister()
542 return -EINVAL; in i2c_stm32_target_unregister()
545 if (data->master_active) { in i2c_stm32_target_unregister()
546 return -EBUSY; in i2c_stm32_target_unregister()
555 if (!data->smbalert_active) { in i2c_stm32_target_unregister()
559 data->slave_attached = false; in i2c_stm32_target_unregister()
570 const struct i2c_stm32_config *cfg = dev->config; in stm32_i2c_event_isr()
571 struct i2c_stm32_data *data = dev->data; in stm32_i2c_event_isr() local
572 I2C_TypeDef *i2c = cfg->i2c; in stm32_i2c_event_isr()
575 if (data->slave_attached && !data->master_active) { in stm32_i2c_event_isr()
584 LL_I2C_TransmitData8(i2c, data->slave_address); in stm32_i2c_event_isr()
589 } else if (LL_I2C_IsActiveFlag_TXE(i2c) && data->current.is_write) { in stm32_i2c_event_isr()
591 } else if (LL_I2C_IsActiveFlag_RXNE(i2c) && !data->current.is_write) { in stm32_i2c_event_isr()
599 const struct i2c_stm32_config *cfg = dev->config; in stm32_i2c_error_isr()
600 struct i2c_stm32_data *data = dev->data; in stm32_i2c_error_isr() local
601 I2C_TypeDef *i2c = cfg->i2c; in stm32_i2c_error_isr()
604 if (data->slave_attached && !data->master_active) { in stm32_i2c_error_isr()
613 data->current.is_nack = 1U; in stm32_i2c_error_isr()
618 data->current.is_arlo = 1U; in stm32_i2c_error_isr()
624 data->current.is_err = 1U; in stm32_i2c_error_isr()
631 if (data->smbalert_cb_func != NULL) { in stm32_i2c_error_isr()
632 data->smbalert_cb_func(data->smbalert_cb_dev); in stm32_i2c_error_isr()
645 struct i2c_stm32_data *data = dev->data; in stm32_i2c_msg_write() local
651 if (k_sem_take(&data->device_sync_sem, in stm32_i2c_msg_write()
653 LOG_DBG("%s: WRITE timeout", __func__); in stm32_i2c_msg_write()
655 return -EIO; in stm32_i2c_msg_write()
664 const struct i2c_stm32_config *cfg = dev->config; in stm32_i2c_msg_read()
665 struct i2c_stm32_data *data = dev->data; in stm32_i2c_msg_read() local
666 I2C_TypeDef *i2c = cfg->i2c; in stm32_i2c_msg_read()
673 if (k_sem_take(&data->device_sync_sem, in stm32_i2c_msg_read()
675 LOG_DBG("%s: READ timeout", __func__); in stm32_i2c_msg_read()
677 return -EIO; in stm32_i2c_msg_read()
687 const struct i2c_stm32_config *cfg = dev->config; in check_errors()
688 struct i2c_stm32_data *data = dev->data; in check_errors() local
689 I2C_TypeDef *i2c = cfg->i2c; in check_errors()
694 data->current.is_nack = 1U; in check_errors()
701 data->current.is_arlo = 1U; in check_errors()
708 data->current.is_err = 1U; in check_errors()
715 data->current.is_err = 1U; in check_errors()
721 return -EIO; in check_errors()
724 static int stm32_i2c_wait_timeout(uint16_t *timeout) in stm32_i2c_wait_timeout() argument
726 if (*timeout == 0) { in stm32_i2c_wait_timeout()
730 (*timeout)--; in stm32_i2c_wait_timeout()
738 const struct i2c_stm32_config *cfg = dev->config; in stm32_i2c_msg_write()
739 struct i2c_stm32_data *data = dev->data; in stm32_i2c_msg_write() local
740 I2C_TypeDef *i2c = cfg->i2c; in stm32_i2c_msg_write()
741 uint32_t len = msg->len; in stm32_i2c_msg_write()
742 uint16_t timeout; in stm32_i2c_msg_write() local
743 uint8_t *buf = msg->buf; in stm32_i2c_msg_write()
748 if (msg->flags & I2C_MSG_RESTART) { in stm32_i2c_msg_write()
749 timeout = STM32_I2C_TIMEOUT_USEC; in stm32_i2c_msg_write()
751 if (stm32_i2c_wait_timeout(&timeout)) { in stm32_i2c_msg_write()
753 data->current.is_err = 1U; in stm32_i2c_msg_write()
758 if (I2C_ADDR_10_BITS & data->dev_config) { in stm32_i2c_msg_write()
763 timeout = STM32_I2C_TIMEOUT_USEC; in stm32_i2c_msg_write()
765 if (stm32_i2c_wait_timeout(&timeout)) { in stm32_i2c_msg_write()
767 data->current.is_err = 1U; in stm32_i2c_msg_write()
772 slave = data->slave_address & 0xFF; in stm32_i2c_msg_write()
780 timeout = STM32_I2C_TIMEOUT_USEC; in stm32_i2c_msg_write()
782 if (LL_I2C_IsActiveFlag_AF(i2c) || stm32_i2c_wait_timeout(&timeout)) { in stm32_i2c_msg_write()
785 data->current.is_nack = 1U; in stm32_i2c_msg_write()
793 timeout = STM32_I2C_TIMEOUT_USEC; in stm32_i2c_msg_write()
798 if (LL_I2C_IsActiveFlag_AF(i2c) || stm32_i2c_wait_timeout(&timeout)) { in stm32_i2c_msg_write()
801 data->current.is_nack = 1U; in stm32_i2c_msg_write()
807 len--; in stm32_i2c_msg_write()
810 timeout = STM32_I2C_TIMEOUT_USEC; in stm32_i2c_msg_write()
812 if (stm32_i2c_wait_timeout(&timeout)) { in stm32_i2c_msg_write()
814 data->current.is_err = 1U; in stm32_i2c_msg_write()
819 if (msg->flags & I2C_MSG_STOP) { in stm32_i2c_msg_write()
836 const struct i2c_stm32_config *cfg = dev->config; in stm32_i2c_msg_read()
837 struct i2c_stm32_data *data = dev->data; in stm32_i2c_msg_read() local
838 I2C_TypeDef *i2c = cfg->i2c; in stm32_i2c_msg_read()
839 uint32_t len = msg->len; in stm32_i2c_msg_read()
840 uint16_t timeout; in stm32_i2c_msg_read() local
841 uint8_t *buf = msg->buf; in stm32_i2c_msg_read()
846 if (msg->flags & I2C_MSG_RESTART) { in stm32_i2c_msg_read()
847 timeout = STM32_I2C_TIMEOUT_USEC; in stm32_i2c_msg_read()
849 if (stm32_i2c_wait_timeout(&timeout)) { in stm32_i2c_msg_read()
851 data->current.is_err = 1U; in stm32_i2c_msg_read()
856 if (I2C_ADDR_10_BITS & data->dev_config) { in stm32_i2c_msg_read()
861 timeout = STM32_I2C_TIMEOUT_USEC; in stm32_i2c_msg_read()
863 if (stm32_i2c_wait_timeout(&timeout)) { in stm32_i2c_msg_read()
865 data->current.is_err = 1U; in stm32_i2c_msg_read()
872 timeout = STM32_I2C_TIMEOUT_USEC; in stm32_i2c_msg_read()
874 if (stm32_i2c_wait_timeout(&timeout)) { in stm32_i2c_msg_read()
876 data->current.is_err = 1U; in stm32_i2c_msg_read()
883 timeout = STM32_I2C_TIMEOUT_USEC; in stm32_i2c_msg_read()
885 if (stm32_i2c_wait_timeout(&timeout)) { in stm32_i2c_msg_read()
887 data->current.is_err = 1U; in stm32_i2c_msg_read()
900 timeout = STM32_I2C_TIMEOUT_USEC; in stm32_i2c_msg_read()
902 if (LL_I2C_IsActiveFlag_AF(i2c) || stm32_i2c_wait_timeout(&timeout)) { in stm32_i2c_msg_read()
905 data->current.is_nack = 1U; in stm32_i2c_msg_read()
917 /* 2-byte reception: enable NACK and set POS */ in stm32_i2c_msg_read()
924 timeout = STM32_I2C_TIMEOUT_USEC; in stm32_i2c_msg_read()
926 if (stm32_i2c_wait_timeout(&timeout)) { in stm32_i2c_msg_read()
928 data->current.is_err = 1U; in stm32_i2c_msg_read()
933 timeout = STM32_I2C_TIMEOUT_USEC; in stm32_i2c_msg_read()
936 if (msg->flags & I2C_MSG_STOP) { in stm32_i2c_msg_read()
939 len--; in stm32_i2c_msg_read()
945 if (stm32_i2c_wait_timeout(&timeout)) { in stm32_i2c_msg_read()
947 data->current.is_err = 1U; in stm32_i2c_msg_read()
956 if (msg->flags & I2C_MSG_STOP) { in stm32_i2c_msg_read()
960 for (uint32_t counter = 2; counter > 0; counter--) { in stm32_i2c_msg_read()
961 len--; in stm32_i2c_msg_read()
969 if (stm32_i2c_wait_timeout(&timeout)) { in stm32_i2c_msg_read()
971 data->current.is_err = 1U; in stm32_i2c_msg_read()
976 /* Set NACK before reading N-2 byte*/ in stm32_i2c_msg_read()
980 len--; in stm32_i2c_msg_read()
998 const struct i2c_stm32_config *cfg = dev->config; in stm32_i2c_configure_timing()
999 struct i2c_stm32_data *data = dev->data; in stm32_i2c_configure_timing() local
1000 I2C_TypeDef *i2c = cfg->i2c; in stm32_i2c_configure_timing()
1002 switch (I2C_SPEED_GET(data->dev_config)) { in stm32_i2c_configure_timing()
1010 return -EINVAL; in stm32_i2c_configure_timing()