60 	uint32_t reg_base = get_regs(dev);  in i2c_dw_enable_idma()  local
63 		write_dma_cr(DW_IC_DMA_ENABLE, reg_base);  in i2c_dw_enable_idma()
64 		reg = sys_read32(reg_base + DW_IC_REG_DMA_CR);  in i2c_dw_enable_idma()
66 		reg = read_dma_cr(reg_base);  in i2c_dw_enable_idma()
68 		write_dma_cr(reg, reg_base);  in i2c_dw_enable_idma()
69 		reg = sys_read32(reg_base + DW_IC_REG_DMA_CR);  in i2c_dw_enable_idma()
91 	uint32_t reg_base = get_regs(dev);  in i2c_dw_set_fifo_th()  local
93 	write_tdlr(fifo_depth, reg_base);  in i2c_dw_set_fifo_th()
94 	write_rdlr(fifo_depth - 1, reg_base);  in i2c_dw_set_fifo_th()
207 	uint32_t reg_base = get_regs(dev);  in i2c_dw_data_ask()  local
211 		clear_bit_intr_mask_tx_empty(reg_base);  in i2c_dw_data_ask()
216 	ic_comp_param_1.raw = read_comp_param_1(reg_base);  in i2c_dw_data_ask()
221 	rx_empty = (rx_buffer_depth - read_rxflr(reg_base)) - dw->rx_pending;  in i2c_dw_data_ask()
231 	tx_empty = tx_buffer_depth - read_txflr(reg_base);  in i2c_dw_data_ask()
253 		clear_bit_intr_mask_tx_empty(reg_base);  in i2c_dw_data_ask()
256 		write_cmd_data(data, reg_base);  in i2c_dw_data_ask()
267 	uint32_t reg_base = get_regs(dev);  in i2c_dw_data_read()  local
270 	if (test_bit_status_rfne(reg_base) && (dw->xfr_len > 0)) {  in i2c_dw_data_read()
276 	while (test_bit_status_rfne(reg_base) && (dw->xfr_len > 0)) {  in i2c_dw_data_read()
277 		dw->xfr_buf[0] = (uint8_t)read_cmd_data(reg_base);  in i2c_dw_data_read()
299 	uint32_t reg_base = get_regs(dev);  in i2c_dw_data_send()  local
303 		clear_bit_intr_mask_tx_empty(reg_base);  in i2c_dw_data_send()
310 	while (test_bit_status_tfnt(reg_base) && (dw->xfr_len > 0)) {  in i2c_dw_data_send()
328 		write_cmd_data(data, reg_base);  in i2c_dw_data_send()
333 		if (test_bit_intr_stat_tx_abrt(reg_base)) {  in i2c_dw_data_send()
345 	uint32_t reg_base = get_regs(dev);  in i2c_dw_transfer_complete()  local
347 	write_intr_mask(DW_DISABLE_ALL_I2C_INT, reg_base);  in i2c_dw_transfer_complete()
348 	value = read_clr_intr(reg_base);  in i2c_dw_transfer_complete()
365 	uint32_t reg_base = get_regs(port);  in i2c_dw_isr()  local
370 	intr_stat.raw = read_intr_stat(reg_base);  in i2c_dw_isr()
388 	if (test_bit_con_master_mode(reg_base)) {  in i2c_dw_isr()
390 		uint32_t stat = sys_read32(reg_base + IDMA_REG_INTR_STS);  in i2c_dw_isr()
418 			set_bit_intr_mask_tx_empty(reg_base);  in i2c_dw_isr()
440 			value = read_clr_stop_det(reg_base);  in i2c_dw_isr()
447 		uint32_t slave_activity = test_bit_status_activity(reg_base);  in i2c_dw_isr()
465 			} while (test_bit_status_rfne(reg_base));  in i2c_dw_isr()
470 				read_clr_rd_req(reg_base);  in i2c_dw_isr()
496 	uint32_t reg_base = get_regs(dev);  in i2c_dw_setup()  local
501 	clear_bit_enable_en(reg_base);  in i2c_dw_setup()
504 	write_intr_mask(0, reg_base);  in i2c_dw_setup()
507 	value = read_clr_intr(reg_base);  in i2c_dw_setup()
535 		write_ss_scl_lcnt(dw->lcnt, reg_base);  in i2c_dw_setup()
536 		write_ss_scl_hcnt(dw->hcnt, reg_base);  in i2c_dw_setup()
544 		write_fs_scl_lcnt(dw->lcnt, reg_base);  in i2c_dw_setup()
545 		write_fs_scl_hcnt(dw->hcnt, reg_base);  in i2c_dw_setup()
555 		write_hs_scl_lcnt(dw->lcnt, reg_base);  in i2c_dw_setup()
556 		write_hs_scl_hcnt(dw->hcnt, reg_base);  in i2c_dw_setup()
569 	write_con(ic_con.raw, reg_base);  in i2c_dw_setup()
577 	write_rx_tl(0, reg_base);  in i2c_dw_setup()
587 	write_tx_tl(0, reg_base);  in i2c_dw_setup()
589 	ic_tar.raw = read_tar(reg_base);  in i2c_dw_setup()
591 	if (test_bit_con_master_mode(reg_base)) {  in i2c_dw_setup()
596 		write_sar(slave_address, reg_base);  in i2c_dw_setup()
612 	write_tar(ic_tar.raw, reg_base);  in i2c_dw_setup()
625 	uint32_t reg_base = get_regs(dev);  in i2c_dw_transfer()  local
639 	if (test_bit_status_activity(reg_base) || (dw->state & I2C_DW_BUSY)) {  in i2c_dw_transfer()
652 	set_bit_enable_en(reg_base);  in i2c_dw_transfer()
698 		if (test_bit_con_master_mode(reg_base)) {  in i2c_dw_transfer()
701 					reg_base);  in i2c_dw_transfer()
704 			write_intr_mask(DW_ENABLE_TX_INT_I2C_SLAVE, reg_base);  in i2c_dw_transfer()
710 			write_intr_mask(DW_DISABLE_ALL_I2C_INT, reg_base);  in i2c_dw_transfer()
711 			value = read_clr_intr(reg_base);  in i2c_dw_transfer()
745 	uint32_t reg_base = get_regs(dev);  in i2c_dw_runtime_configure()  local
757 		if (value <= (read_fs_spklen(reg_base) + 7)) {  in i2c_dw_runtime_configure()
758 			value = read_fs_spklen(reg_base) + 8;  in i2c_dw_runtime_configure()
767 		if (value <= (read_fs_spklen(reg_base) + 5)) {  in i2c_dw_runtime_configure()
768 			value = read_fs_spklen(reg_base) + 6;  in i2c_dw_runtime_configure()
779 		if (value <= (read_fs_spklen(reg_base) + 7)) {  in i2c_dw_runtime_configure()
780 			value = read_fs_spklen(reg_base) + 8;  in i2c_dw_runtime_configure()
790 		if (value <= (read_fs_spklen(reg_base) + 5)) {  in i2c_dw_runtime_configure()
791 			value = read_fs_spklen(reg_base) + 6;  in i2c_dw_runtime_configure()
802 		if (value <= (read_fs_spklen(reg_base) + 7)) {  in i2c_dw_runtime_configure()
803 			value = read_fs_spklen(reg_base) + 8;  in i2c_dw_runtime_configure()
813 		if (value <= (read_fs_spklen(reg_base) + 5)) {  in i2c_dw_runtime_configure()
814 			value = read_fs_spklen(reg_base) + 6;  in i2c_dw_runtime_configure()
822 			if (value <= (read_hs_spklen(reg_base) + 7)) {  in i2c_dw_runtime_configure()
823 				value = read_hs_spklen(reg_base) + 8;  in i2c_dw_runtime_configure()
829 			if (value <= (read_hs_spklen(reg_base) + 5)) {  in i2c_dw_runtime_configure()
830 				value = read_hs_spklen(reg_base) + 6;  in i2c_dw_runtime_configure()
846 	value = read_clr_intr(reg_base);  in i2c_dw_runtime_configure()
861 	uint32_t reg_base = get_regs(dev);  in i2c_dw_read_byte_non_blocking()  local
863 	if (!test_bit_status_rfne(reg_base)) { /* Rx FIFO must not be empty */  in i2c_dw_read_byte_non_blocking()
867 	return (uint8_t)read_cmd_data(reg_base);  in i2c_dw_read_byte_non_blocking()
872 	uint32_t reg_base = get_regs(dev);  in i2c_dw_write_byte_non_blocking()  local
874 	if (!test_bit_status_tfnt(reg_base)) { /* Tx FIFO must not be full */  in i2c_dw_write_byte_non_blocking()
878 	write_cmd_data(data, reg_base);  in i2c_dw_write_byte_non_blocking()
884 	uint32_t reg_base = get_regs(dev);  in i2c_dw_set_master_mode()  local
887 	clear_bit_enable_en(reg_base);  in i2c_dw_set_master_mode()
892 	write_con(ic_con.raw, reg_base);  in i2c_dw_set_master_mode()
894 	set_bit_enable_en(reg_base);  in i2c_dw_set_master_mode()
896 	ic_comp_param_1.raw = read_comp_param_1(reg_base);  in i2c_dw_set_master_mode()
898 	write_tx_tl(ic_comp_param_1.bits.tx_buffer_depth + 1, reg_base);  in i2c_dw_set_master_mode()
899 	write_rx_tl(ic_comp_param_1.bits.rx_buffer_depth + 1, reg_base);  in i2c_dw_set_master_mode()
906 	uint32_t reg_base = get_regs(dev);  in i2c_dw_set_slave_mode()  local
909 	ic_con.raw = read_con(reg_base);  in i2c_dw_set_slave_mode()
911 	clear_bit_enable_en(reg_base);  in i2c_dw_set_slave_mode()
919 	write_con(ic_con.raw, reg_base);  in i2c_dw_set_slave_mode()
920 	write_sar(addr, reg_base);  in i2c_dw_set_slave_mode()
921 	write_intr_mask(~DW_INTR_MASK_RESET, reg_base);  in i2c_dw_set_slave_mode()
923 	set_bit_enable_en(reg_base);  in i2c_dw_set_slave_mode()
925 	write_tx_tl(0, reg_base);  in i2c_dw_set_slave_mode()
926 	write_rx_tl(0, reg_base);  in i2c_dw_set_slave_mode()
936 	uint32_t reg_base = get_regs(dev);  in i2c_dw_slave_register()  local
943 			reg_base);  in i2c_dw_slave_register()
963 	uint32_t reg_base = get_regs(dev);  in i2c_dw_slave_read_clear_intr_bits()  local
967 	intr_stat.raw = read_intr_stat(reg_base);  in i2c_dw_slave_read_clear_intr_bits()
970 		read_clr_tx_abrt(reg_base);  in i2c_dw_slave_read_clear_intr_bits()
975 		read_clr_rx_under(reg_base);  in i2c_dw_slave_read_clear_intr_bits()
980 		read_clr_rx_over(reg_base);  in i2c_dw_slave_read_clear_intr_bits()
985 		read_clr_tx_over(reg_base);  in i2c_dw_slave_read_clear_intr_bits()
990 		read_clr_rx_done(reg_base);  in i2c_dw_slave_read_clear_intr_bits()
995 		read_clr_activity(reg_base);  in i2c_dw_slave_read_clear_intr_bits()
1000 		read_clr_stop_det(reg_base);  in i2c_dw_slave_read_clear_intr_bits()
1008 		read_clr_start_det(reg_base);  in i2c_dw_slave_read_clear_intr_bits()
1013 		read_clr_gen_call(reg_base);  in i2c_dw_slave_read_clear_intr_bits()
1095 	uint32_t reg_base = get_regs(dev);  in i2c_dw_initialize()  local
1097 	clear_bit_enable_en(reg_base);  in i2c_dw_initialize()
1100 	if (read_comp_type(reg_base) != I2C_DW_MAGIC_KEY) {  in i2c_dw_initialize()
1111 	ic_con.raw = read_con(reg_base);  in i2c_dw_initialize()