Lines Matching refs:base
17 #define GPIO_XLNX_PS_BANK_MASK_DATA_LSW_REG (dev_data->base\
19 #define GPIO_XLNX_PS_BANK_MASK_DATA_MSW_REG ((dev_data->base + 0x04)\
21 #define GPIO_XLNX_PS_BANK_DATA_REG ((dev_data->base + 0x40)\
23 #define GPIO_XLNX_PS_BANK_DATA_RO_REG ((dev_data->base + 0x60)\
25 #define GPIO_XLNX_PS_BANK_DIRM_REG ((dev_data->base + 0x204)\
27 #define GPIO_XLNX_PS_BANK_OEN_REG ((dev_data->base + 0x208)\
29 #define GPIO_XLNX_PS_BANK_INT_MASK_REG ((dev_data->base + 0x20C)\
31 #define GPIO_XLNX_PS_BANK_INT_EN_REG ((dev_data->base + 0x210)\
33 #define GPIO_XLNX_PS_BANK_INT_DIS_REG ((dev_data->base + 0x214)\
35 #define GPIO_XLNX_PS_BANK_INT_STAT_REG ((dev_data->base + 0x218)\
37 #define GPIO_XLNX_PS_BANK_INT_TYPE_REG ((dev_data->base + 0x21C)\
39 #define GPIO_XLNX_PS_BANK_INT_POLARITY_REG ((dev_data->base + 0x220)\
41 #define GPIO_XLNX_PS_BANK_INT_ANY_REG ((dev_data->base + 0x224)\
54 mem_addr_t base; member