82 		sys_write32(dirm_data, GPIO_XLNX_PS_BANK_DIRM_REG);  in gpio_xlnx_ps_pin_configure()
96 		sys_write32(bank_data, GPIO_XLNX_PS_BANK_DATA_REG);  in gpio_xlnx_ps_pin_configure()
99 		sys_write32(oen_data, GPIO_XLNX_PS_BANK_OEN_REG);  in gpio_xlnx_ps_pin_configure()
108 		sys_write32(oen_data, GPIO_XLNX_PS_BANK_OEN_REG);  in gpio_xlnx_ps_pin_configure()
109 		sys_write32(dirm_data, GPIO_XLNX_PS_BANK_DIRM_REG);  in gpio_xlnx_ps_pin_configure()
173 	sys_write32(bank_data, GPIO_XLNX_PS_BANK_DATA_REG);  in gpio_xlnx_ps_bank_set_masked()
202 	sys_write32(bank_data, GPIO_XLNX_PS_BANK_DATA_REG);  in gpio_xlnx_ps_bank_set_bits()
231 	sys_write32(bank_data, GPIO_XLNX_PS_BANK_DATA_REG);  in gpio_xlnx_ps_bank_clear_bits()
260 	sys_write32(bank_data, GPIO_XLNX_PS_BANK_DATA_REG);  in gpio_xlnx_ps_bank_toggle_bits()
304 	sys_write32(pin_mask, GPIO_XLNX_PS_BANK_INT_DIS_REG);  in gpio_xlnx_ps_bank_pin_irq_configure()
339 	sys_write32(int_any_data, GPIO_XLNX_PS_BANK_INT_ANY_REG);  in gpio_xlnx_ps_bank_pin_irq_configure()
340 	sys_write32(int_polarity_data, GPIO_XLNX_PS_BANK_INT_POLARITY_REG);  in gpio_xlnx_ps_bank_pin_irq_configure()
341 	sys_write32(int_type_data, GPIO_XLNX_PS_BANK_INT_TYPE_REG);  in gpio_xlnx_ps_bank_pin_irq_configure()
345 		sys_write32(pin_mask, GPIO_XLNX_PS_BANK_INT_STAT_REG);  in gpio_xlnx_ps_bank_pin_irq_configure()
346 		sys_write32(pin_mask, GPIO_XLNX_PS_BANK_INT_EN_REG);  in gpio_xlnx_ps_bank_pin_irq_configure()
377 		sys_write32(int_status, GPIO_XLNX_PS_BANK_INT_STAT_REG);  in gpio_xlnx_ps_bank_get_int_status()
442 	sys_write32(~0x0, GPIO_XLNX_PS_BANK_INT_DIS_REG);  /* Disable all interrupts */  in gpio_xlnx_ps_bank_init()
443 	sys_write32(~0x0, GPIO_XLNX_PS_BANK_INT_STAT_REG); /* Clear all interrupts */  in gpio_xlnx_ps_bank_init()
444 	sys_write32(0x0, GPIO_XLNX_PS_BANK_OEN_REG);       /* All outputs disabled */  in gpio_xlnx_ps_bank_init()
445 	sys_write32(0x0, GPIO_XLNX_PS_BANK_DIRM_REG);      /* All pins input */  in gpio_xlnx_ps_bank_init()
446 	sys_write32(0x0, GPIO_XLNX_PS_BANK_DATA_REG);      /* Zero data register */  in gpio_xlnx_ps_bank_init()