Lines Matching +full:data +full:- +full:bits
6 * SPDX-License-Identifier: Apache-2.0
24 #define DEV_CFG(_dev) ((const struct gpio_xlnx_ps_bank_dev_cfg *)(_dev)->config)
25 #define DEV_DATA(_dev) ((struct gpio_xlnx_ps_bank_dev_data *const)(_dev)->data)
34 * - Pull up
35 * - Pull down
36 * - Open drain
37 * - Open source.
45 * -EINVAL if the specified pin index is out of range,
46 * -ENOTSUP if the pin configuration data contains a flag
64 return -ENOTSUP; in gpio_xlnx_ps_pin_configure()
67 /* Read the data direction & output enable registers */ in gpio_xlnx_ps_pin_configure()
77 * direction register to be written *BEFORE* the data in gpio_xlnx_ps_pin_configure()
88 * -> Write the initial output value into the data register. in gpio_xlnx_ps_pin_configure()
105 * Disable the output first in case of an O -> I in gpio_xlnx_ps_pin_configure()
119 * read-only data register. This includes the current values
126 * RO data register will be written to.
129 * -EINVAL if the pointer to the output variable is NULL.
144 * Performs a masked write operation on the data register of
147 * RO data register, clearing any bits that are zeroes in the
149 * is applied to the data word to be written into the current
150 * bank's data register. The masked data word read from the
151 * RO data register and the masked data word provided by the
152 * caller ar then OR'ed and written to the bank's data register.
156 * of the data register and the data word provided
158 * @param value Value to be written to the current bank's data
179 * @brief Sets bits in the data register of the GPIO pin bank.
181 * Sets bits in the data register of the current GPIO pin bank
182 * as a read-modify-write operation. All bits set in the bit
183 * mask provided by the caller are OR'ed into the current data
188 * @param pins Bit mask specifying which bits shall be set in
189 * the data word of the current GPIO pin bank.
208 * @brief Clears bits in the data register of the GPIO pin bank.
210 * Clears bits in the data register of the current GPIO pin bank
211 * as a read-modify-write operation. All bits set in the bit
212 * mask provided by the caller are NAND'ed into the current data
217 * @param pins Bit mask specifying which bits shall be cleared
218 * in the data word of the current GPIO pin bank.
237 * @brief Toggles bits in the data register of the GPIO pin bank.
239 * Toggles bits in the data register of the current GPIO pin bank
240 * as a read-modify-write operation. All bits set in the bit
241 * mask provided by the caller are XOR'ed into the current data
246 * @param pins Bit mask specifying which bits shall be toggled
247 * in the data word of the current GPIO pin bank.
273 * - edge or level triggered,
274 * - rising edge / high level or falling edge / low level,
275 * - in edge mode only: trigger on both rising and falling edge.
285 * -EINVAL if the specified pin index is out of range,
286 * -ENOTSUP if the interrupt configuration data contains an
303 /* Disable the specified pin's interrupt before (re-)configuring it */ in gpio_xlnx_ps_bank_pin_irq_configure()
317 return -EINVAL; in gpio_xlnx_ps_bank_pin_irq_configure()
328 return -EINVAL; in gpio_xlnx_ps_bank_pin_irq_configure()
357 * indicated. This information can either be used by the PM sub-
360 * of how many bank sub-devices exist. As the current status is
384 * @brief Callback management re-direction function.
386 * Re-directs any callback management calls relating to the current
387 * GPIO bank to the GPIO sub-system. Comp. documentation of the
388 * underlying sub-system's #gpio_manage_callback function.
403 return gpio_manage_callback(&dev_data->callbacks, callback, set); in gpio_xlnx_ps_bank_manage_callback()
420 * @brief Initialize a MIO / EMIO GPIO bank sub-device
422 * Initialize a MIO / EMIO GPIO bank sub-device, which is a child
423 * of the parent Xilinx PS GPIO controller device driver. This ini-
436 __ASSERT(dev_data->base != 0, "%s mapped base address missing", dev->name); in gpio_xlnx_ps_bank_init()
437 if (dev_data->base == 0) { in gpio_xlnx_ps_bank_init()
438 LOG_ERR("%s mapped base address missing", dev->name); in gpio_xlnx_ps_bank_init()
439 return -EIO; in gpio_xlnx_ps_bank_init()
446 sys_write32(0x0, GPIO_XLNX_PS_BANK_DATA_REG); /* Zero data register */ in gpio_xlnx_ps_bank_init()