Lines Matching +full:gpio +full:- +full:controller

2  * Xilinx Processor System MIO / EMIO GPIO controller driver
6  * SPDX-License-Identifier: Apache-2.0
10 #include <zephyr/drivers/gpio.h>
12 #include <zephyr/drivers/gpio/gpio_utils.h>
23 #define DEV_CFG(_dev) ((const struct gpio_xlnx_ps_dev_cfg *)(_dev)->config)
24 #define DEV_DATA(_dev) ((struct gpio_xlnx_ps_dev_data *const)(_dev)->data)
30 static DEVICE_API(gpio, gpio_xlnx_ps_default_apis);
33  * @brief Initialize a Xilinx PS GPIO controller parent device
35  * Initialize a Xilinx PS GPIO controller parent device, whose task it is
36  * to handle the IRQ line of each controller instance, while the configuration,
37  * status and data acquisition of each MIO / EMIO GPIO pin associated with
38  * the parent controller instance is handled via the respective GPIO pin
41  * @param dev Pointer to the PS GPIO controller's device.
53 	dev_data->base = DEVICE_MMIO_NAMED_GET(dev, reg_base);  in gpio_xlnx_ps_init()
54 	__ASSERT(dev_data->base != 0, "%s map register space failed", dev->name);  in gpio_xlnx_ps_init()
57 	for (bank = 0; bank < dev_conf->num_banks; bank++) {  in gpio_xlnx_ps_init()
59 			dev_conf->bank_devices[bank]->data;  in gpio_xlnx_ps_init()
60 		__ASSERT(bank_data != NULL, "%s bank %u data unresolved", dev->name, bank);  in gpio_xlnx_ps_init()
61 		bank_data->base = dev_data->base;  in gpio_xlnx_ps_init()
65 	dev_conf->config_func(dev);  in gpio_xlnx_ps_init()
71  * @brief Xilinx PS GPIO controller parent device ISR
73  * Interrupt service routine for the Xilinx PS GPIO controller's
74  * IRQ. The ISR iterates all associated MIO / EMIO GPIO pink bank
76  * If any pending interrupt is detected within a GPIO pin bank,
78  * using the functionality provided by the GPIO sub-system.
80  * @param dev Pointer to the PS GPIO controller's device.
92 	for (bank = 0; bank < dev_conf->num_banks; bank++) {  in gpio_xlnx_ps_isr()
93 		api = dev_conf->bank_devices[bank]->api;  in gpio_xlnx_ps_isr()
97 			int_mask = api->get_pending_int(dev_conf->bank_devices[bank]);  in gpio_xlnx_ps_isr()
101 				dev_conf->bank_devices[bank]->data;  in gpio_xlnx_ps_isr()
102 			gpio_fire_callbacks(&bank_data->callbacks,  in gpio_xlnx_ps_isr()
103 				dev_conf->bank_devices[bank], int_mask);  in gpio_xlnx_ps_isr()
111  * Macros generating a list of all associated GPIO pin bank child
112  * devices for the parent controller device's config data struct
121 /* Device config & run-time data struct creation macros */
136  * Macro used to generate each parent controller device's IRQ attach
155  * Top-level device initialization macro, executed for each PS GPIO
167  * Register & initialize all instances of the Processor System's MIO / EMIO GPIO
168  * controller specified in the device tree.