Lines Matching +full:tri +full:- +full:default
4 * SPDX-License-Identifier: Apache-2.0
54 uint32_t tri; member
67 const struct gpio_xlnx_axi_config *config = dev->config; in gpio_xlnx_axi_read_data()
69 return sys_read32(config->base + (config->channel * GPIO2_OFFSET) + GPIO_DATA_OFFSET); in gpio_xlnx_axi_read_data()
74 const struct gpio_xlnx_axi_config *config = dev->config; in gpio_xlnx_axi_write_data()
76 sys_write32(val, config->base + (config->channel * GPIO2_OFFSET) + GPIO_DATA_OFFSET); in gpio_xlnx_axi_write_data()
81 const struct gpio_xlnx_axi_config *config = dev->config; in gpio_xlnx_axi_write_tri()
83 sys_write32(val, config->base + (config->channel * GPIO2_OFFSET) + GPIO_TRI_OFFSET); in gpio_xlnx_axi_write_tri()
88 const struct gpio_xlnx_axi_config *config = dev->config; in gpio_xlnx_axi_pin_configure()
89 struct gpio_xlnx_axi_data *data = dev->data; in gpio_xlnx_axi_pin_configure()
92 if (!(BIT(pin) & config->common.port_pin_mask)) { in gpio_xlnx_axi_pin_configure()
93 return -EINVAL; in gpio_xlnx_axi_pin_configure()
97 return -ENOTSUP; in gpio_xlnx_axi_pin_configure()
101 return -ENOTSUP; in gpio_xlnx_axi_pin_configure()
105 return -ENOTSUP; in gpio_xlnx_axi_pin_configure()
108 if (((flags & GPIO_INPUT) != 0) && config->all_outputs) { in gpio_xlnx_axi_pin_configure()
109 return -ENOTSUP; in gpio_xlnx_axi_pin_configure()
112 if (((flags & GPIO_OUTPUT) != 0) && config->all_inputs) { in gpio_xlnx_axi_pin_configure()
113 return -ENOTSUP; in gpio_xlnx_axi_pin_configure()
120 data->tri |= BIT(pin); in gpio_xlnx_axi_pin_configure()
124 data->dout |= BIT(pin); in gpio_xlnx_axi_pin_configure()
126 data->dout &= ~BIT(pin); in gpio_xlnx_axi_pin_configure()
128 data->tri &= ~BIT(pin); in gpio_xlnx_axi_pin_configure()
130 default: in gpio_xlnx_axi_pin_configure()
131 return -ENOTSUP; in gpio_xlnx_axi_pin_configure()
134 gpio_xlnx_axi_write_data(dev, data->dout); in gpio_xlnx_axi_pin_configure()
135 gpio_xlnx_axi_write_tri(dev, data->tri); in gpio_xlnx_axi_pin_configure()
151 struct gpio_xlnx_axi_data *data = dev->data; in gpio_xlnx_axi_port_set_masked_raw()
155 data->dout = (data->dout & ~mask) | (mask & value); in gpio_xlnx_axi_port_set_masked_raw()
156 gpio_xlnx_axi_write_data(dev, data->dout); in gpio_xlnx_axi_port_set_masked_raw()
164 struct gpio_xlnx_axi_data *data = dev->data; in gpio_xlnx_axi_port_set_bits_raw()
168 data->dout |= pins; in gpio_xlnx_axi_port_set_bits_raw()
169 gpio_xlnx_axi_write_data(dev, data->dout); in gpio_xlnx_axi_port_set_bits_raw()
177 struct gpio_xlnx_axi_data *data = dev->data; in gpio_xlnx_axi_port_clear_bits_raw()
181 data->dout &= ~pins; in gpio_xlnx_axi_port_clear_bits_raw()
182 gpio_xlnx_axi_write_data(dev, data->dout); in gpio_xlnx_axi_port_clear_bits_raw()
190 struct gpio_xlnx_axi_data *data = dev->data; in gpio_xlnx_axi_port_toggle_bits()
194 data->dout ^= pins; in gpio_xlnx_axi_port_toggle_bits()
195 gpio_xlnx_axi_write_data(dev, data->dout); in gpio_xlnx_axi_port_toggle_bits()
210 const struct gpio_xlnx_axi_config *config = dev->config; in gpio_xlnx_axi_pin_interrupt_configure()
211 struct gpio_xlnx_axi_data *data = dev->data; in gpio_xlnx_axi_pin_interrupt_configure()
213 const uint32_t chan_mask = BIT(config->channel); in gpio_xlnx_axi_pin_interrupt_configure()
217 if (!config->interrupts_available) { in gpio_xlnx_axi_pin_interrupt_configure()
218 return -ENOTSUP; in gpio_xlnx_axi_pin_interrupt_configure()
223 return -ENOTSUP; in gpio_xlnx_axi_pin_interrupt_configure()
228 data->rising_edge_interrupts &= ~pin_mask; in gpio_xlnx_axi_pin_interrupt_configure()
229 data->falling_edge_interrupts &= ~pin_mask; in gpio_xlnx_axi_pin_interrupt_configure()
233 data->rising_edge_interrupts |= pin_mask; in gpio_xlnx_axi_pin_interrupt_configure()
236 data->falling_edge_interrupts |= pin_mask; in gpio_xlnx_axi_pin_interrupt_configure()
243 enabled_interrupts = sys_read32(config->base + IPIER_OFFSET); in gpio_xlnx_axi_pin_interrupt_configure()
244 if (data->rising_edge_interrupts || data->falling_edge_interrupts) { in gpio_xlnx_axi_pin_interrupt_configure()
249 if (sys_read32(config->base + IPISR_OFFSET) & chan_mask) { in gpio_xlnx_axi_pin_interrupt_configure()
250 sys_write32(chan_mask, config->base + IPISR_OFFSET); in gpio_xlnx_axi_pin_interrupt_configure()
252 data->previous_data_reading = gpio_xlnx_axi_read_data(dev); in gpio_xlnx_axi_pin_interrupt_configure()
259 sys_write32(enabled_interrupts, config->base + IPIER_OFFSET); in gpio_xlnx_axi_pin_interrupt_configure()
270 struct gpio_xlnx_axi_data *data = dev->data; in gpio_xlnx_axi_manage_callback()
272 return gpio_manage_callback(&data->callbacks, callback, set); in gpio_xlnx_axi_manage_callback()
283 const struct gpio_xlnx_axi_config *config = dev->config; in gpio_xlnx_axi_get_pending_int()
284 struct gpio_xlnx_axi_data *data = dev->data; in gpio_xlnx_axi_get_pending_int()
285 const uint32_t chan_mask = BIT(config->channel); in gpio_xlnx_axi_get_pending_int()
297 interrupt_flags = sys_read32(config->base + IPISR_OFFSET); in gpio_xlnx_axi_get_pending_int()
305 sys_write32(chan_mask, config->base + IPISR_OFFSET); in gpio_xlnx_axi_get_pending_int()
309 changed_pins = current_data ^ data->previous_data_reading; in gpio_xlnx_axi_get_pending_int()
310 data->previous_data_reading = current_data; in gpio_xlnx_axi_get_pending_int()
313 interrupts = (changed_and_rising_edge & data->rising_edge_interrupts) | in gpio_xlnx_axi_get_pending_int()
314 (changed_and_falling_edge & data->falling_edge_interrupts); in gpio_xlnx_axi_get_pending_int()
324 struct gpio_xlnx_axi_data *data = dev->data; in gpio_xlnx_axi_isr()
326 gpio_fire_callbacks(&data->callbacks, dev, gpio_xlnx_axi_get_pending_int(dev)); in gpio_xlnx_axi_isr()
331 if (data->other_channel_device) { in gpio_xlnx_axi_isr()
332 struct gpio_xlnx_axi_data *other_data = data->other_channel_device->data; in gpio_xlnx_axi_isr()
334 gpio_fire_callbacks(&other_data->callbacks, data->other_channel_device, in gpio_xlnx_axi_isr()
335 gpio_xlnx_axi_get_pending_int(data->other_channel_device)); in gpio_xlnx_axi_isr()
342 struct gpio_xlnx_axi_data *data = dev->data; in gpio_xlnx_axi_init()
344 gpio_xlnx_axi_write_data(dev, data->dout); in gpio_xlnx_axi_init()
345 gpio_xlnx_axi_write_tri(dev, data->tri); in gpio_xlnx_axi_init()
348 const struct gpio_xlnx_axi_config *config = dev->config; in gpio_xlnx_axi_init()
350 if (config->irq_config_func != NULL) { in gpio_xlnx_axi_init()
355 sys_write32(0x0, config->base + IPIER_OFFSET); in gpio_xlnx_axi_init()
358 sys_write32(sys_read32(config->base + IPISR_OFFSET), config->base + IPISR_OFFSET); in gpio_xlnx_axi_init()
361 sys_write32(GIER_GIE, config->base + GIER_OFFSET); in gpio_xlnx_axi_init()
363 config->irq_config_func(dev); in gpio_xlnx_axi_init()
395 .tri = DT_INST_PROP_OR(n, xlnx_tri_default_2, GENMASK(MAX_GPIOS - 1, 0)), \
422 .tri = DT_INST_PROP_OR(n, xlnx_tri_default, GENMASK(MAX_GPIOS - 1, 0)), \