Lines Matching refs:regs

26 	PortGroup *regs;  member
56 PortGroup *regs = config->regs; in gpio_sam0_config() local
76 regs->OUTCLR.reg = BIT(pin); in gpio_sam0_config()
78 regs->OUTSET.reg = BIT(pin); in gpio_sam0_config()
80 regs->DIRSET.reg = BIT(pin); in gpio_sam0_config()
83 regs->DIRCLR.reg = BIT(pin); in gpio_sam0_config()
89 regs->OUTSET.reg = BIT(pin); in gpio_sam0_config()
91 regs->OUTCLR.reg = BIT(pin); in gpio_sam0_config()
102 regs->PINCFG[pin] = pincfg; in gpio_sam0_config()
112 *value = config->regs->IN.reg; in gpio_sam0_port_get_raw()
122 uint32_t out = config->regs->OUT.reg; in gpio_sam0_port_set_masked_raw()
124 config->regs->OUT.reg = (out & ~mask) | (value & mask); in gpio_sam0_port_set_masked_raw()
134 config->regs->OUTSET.reg = pins; in gpio_sam0_port_set_bits_raw()
144 config->regs->OUTCLR.reg = pins; in gpio_sam0_port_clear_bits_raw()
154 config->regs->OUTTGL.reg = pins; in gpio_sam0_port_toggle_bits()
168 PortGroup *regs = config->regs; in gpio_sam0_pin_interrupt_configure() local
170 .reg = regs->PINCFG[pin].reg, in gpio_sam0_pin_interrupt_configure()
199 || ((regs->DIR.reg & BIT(pin)) != 0)) { in gpio_sam0_pin_interrupt_configure()
207 regs->PMUX[pin / 2U].bit.PMUXO = PORT_PMUX_PMUXE_A_Val; in gpio_sam0_pin_interrupt_configure()
209 regs->PMUX[pin / 2U].bit.PMUXE = PORT_PMUX_PMUXE_A_Val; in gpio_sam0_pin_interrupt_configure()
248 regs->PINCFG[pin] = pincfg; in gpio_sam0_pin_interrupt_configure()
295 .regs = (PortGroup *)DT_REG_ADDR(DT_NODELABEL(porta)),
317 .regs = (PortGroup *)DT_REG_ADDR(DT_NODELABEL(portb)),
339 .regs = (PortGroup *)DT_REG_ADDR(DT_NODELABEL(portc)),
361 .regs = (PortGroup *)DT_REG_ADDR(DT_NODELABEL(portd)),