2  * Copyright 2022-2024 NXP
4  * SPDX-License-Identifier: Apache-2.0
13 #include <zephyr/dt-bindings/gpio/nxp-s32-gpio.h>
33 #define GPIO_READ(r)      sys_read16(config->gpio_base + (r))
34 #define GPIO_WRITE(r, v)  sys_write16((v), config->gpio_base + (r))
35 #define PORT_READ(p)      sys_read32(config->port_base + SIUL2_MSCR(p))
36 #define PORT_WRITE(p, v)  sys_write32((v), config->port_base + SIUL2_MSCR(p))
86 	const struct gpio_nxp_s32_config *config = dev->config;  in nxp_s32_gpio_configure()
91 		return -ENOTSUP;  in nxp_s32_gpio_configure()
95 	struct gpio_nxp_s32_data *data = dev->data;  in nxp_s32_gpio_configure()
97 	WRITE_BIT(data->pin_wkpu_mask, pin, (flags & NXP_S32_GPIO_INT_WKPU));  in nxp_s32_gpio_configure()
100 		return -ENOTSUP;  in nxp_s32_gpio_configure()
113 			pgpdo_val |= BIT(15 - pin);  in nxp_s32_gpio_configure()
115 			pgpdo_val &= ~BIT(15 - pin);  in nxp_s32_gpio_configure()
135 	const struct gpio_nxp_s32_config *config = port->config;  in nxp_s32_gpio_port_get_raw()
146 	const struct gpio_nxp_s32_config *config = port->config;  in nxp_s32_gpio_port_set_masked_raw()
159 	const struct gpio_nxp_s32_config *config = port->config;  in nxp_s32_gpio_port_set_bits_raw()
172 	const struct gpio_nxp_s32_config *config = port->config;  in nxp_s32_gpio_port_clear_bits_raw()
185 	const struct gpio_nxp_s32_config *config = port->config;  in nxp_s32_gpio_port_toggle_bits()
202 	for (i = 0; i < irq_cfg->map_cnt; i++) {  in nxp_s32_gpio_pin_to_line()
203 		if (irq_cfg->map[i].pin == pin) {  in nxp_s32_gpio_pin_to_line()
204 			return irq_cfg->map[i].line;  in nxp_s32_gpio_pin_to_line()
214 	struct gpio_nxp_s32_data *data = dev->data;  in nxp_s32_gpio_isr()
216 	gpio_fire_callbacks(&data->callbacks, dev, BIT(pin));  in nxp_s32_gpio_isr()
234 		return -ENOTSUP;  in nxp_s32_gpio_eirq_get_trigger()
245 	const struct gpio_nxp_s32_config *config = dev->config;  in nxp_s32_gpio_config_eirq()
246 	const struct gpio_nxp_s32_irq_config *irq_cfg = config->eirq_info;  in nxp_s32_gpio_config_eirq()
252 		return -ENOTSUP;  in nxp_s32_gpio_config_eirq()
256 		return -ENOTSUP;  in nxp_s32_gpio_config_eirq()
265 		return -ENOTSUP;  in nxp_s32_gpio_config_eirq()
269 		eirq_nxp_s32_disable_interrupt(irq_cfg->ctrl, irq_line);  in nxp_s32_gpio_config_eirq()
270 		eirq_nxp_s32_unset_callback(irq_cfg->ctrl, irq_line);  in nxp_s32_gpio_config_eirq()
273 			return -ENOTSUP;  in nxp_s32_gpio_config_eirq()
275 		if (eirq_nxp_s32_set_callback(irq_cfg->ctrl, irq_line, pin,  in nxp_s32_gpio_config_eirq()
278 			return -EBUSY;  in nxp_s32_gpio_config_eirq()
280 		eirq_nxp_s32_enable_interrupt(irq_cfg->ctrl, irq_line, eirq_trigger);  in nxp_s32_gpio_config_eirq()
302 		return -ENOTSUP;  in nxp_s32_gpio_wkpu_get_trigger()
313 	const struct gpio_nxp_s32_config *config = dev->config;  in nxp_s32_gpio_config_wkpu()
314 	const struct gpio_nxp_s32_irq_config *irq_cfg = config->wkpu_info;  in nxp_s32_gpio_config_wkpu()
319 		LOG_ERR("WKPU controller not available or enabled");  in nxp_s32_gpio_config_wkpu()
320 		return -ENOTSUP;  in nxp_s32_gpio_config_wkpu()
324 		return -ENOTSUP;  in nxp_s32_gpio_config_wkpu()
333 		return -ENOTSUP;  in nxp_s32_gpio_config_wkpu()
337 		wkpu_nxp_s32_disable_interrupt(irq_cfg->ctrl, irq_line);  in nxp_s32_gpio_config_wkpu()
338 		wkpu_nxp_s32_unset_callback(irq_cfg->ctrl, irq_line);  in nxp_s32_gpio_config_wkpu()
341 			return -ENOTSUP;  in nxp_s32_gpio_config_wkpu()
343 		if (wkpu_nxp_s32_set_callback(irq_cfg->ctrl, irq_line, pin,  in nxp_s32_gpio_config_wkpu()
346 			return -EBUSY;  in nxp_s32_gpio_config_wkpu()
348 		wkpu_nxp_s32_enable_interrupt(irq_cfg->ctrl, irq_line, wkpu_trigger);  in nxp_s32_gpio_config_wkpu()
361 	struct gpio_nxp_s32_data *data = dev->data;  in nxp_s32_gpio_pin_interrupt_configure()
363 	if (data->pin_wkpu_mask & BIT(pin)) {  in nxp_s32_gpio_pin_interrupt_configure()
376 	struct gpio_nxp_s32_data *data = dev->data;  in nxp_s32_gpio_manage_callback()
378 	return gpio_manage_callback(&data->callbacks, cb, set);  in nxp_s32_gpio_manage_callback()
387 	const struct gpio_nxp_s32_config *config = dev->config;  in nxp_s32_gpio_pin_get_config()
401 		if ((pins_output & BIT(15 - pin)) != 0) {  in nxp_s32_gpio_pin_get_config()
434 	const struct gpio_nxp_s32_config *config = dev->config;  in nxp_s32_gpio_port_get_direction()
439 	map &= config->common.port_pin_mask;  in nxp_s32_gpio_port_get_direction()
443 			pin = find_lsb_set(map) - 1;  in nxp_s32_gpio_port_get_direction()
453 			pin = find_lsb_set(map) - 1;  in nxp_s32_gpio_port_get_direction()
484 /* Calculate the port pin mask based on ngpios and gpio-reserved-ranges node
492  *		gpio-reserved-ranges = <0 10>;
499 			DT_INST_PROP_BY_IDX(n, gpio_reserved_ranges, 1) - 1,	\
519 			DT_NODE_HAS_PROP(DT_DRV_INST(n), interrupts)),		\
520 			"interrupts and interrupt-parent must be set when "	\
521 			"using external interrupts");				\
549 			"nxp,wkpu and nxp,wkpu-interrupts must be provided");	\