4  * SPDX-License-Identifier: Apache-2.0
9  * @brief Driver to provide the GPIO API for a simple 32-bit i/o register
11  * This is a driver for accessing a simple, fixed purpose, 32-bit
12  * memory-mapped i/o register using the same APIs as GPIO drivers. This is
15  * expects to be specified using a GPIO pin, e.g. for driving an LED, or
16  * chip-select line for an SPI device.
21  * stems from the use of a read-modify-write method for all changes.
23  * It is possible to specify a restricted mask of bits that are valid for
25  * mask will be preserved, even when the whole port is written to using
34 			      gpio_pin_t pin, gpio_flags_t flags)  in gpio_mmio32_config()  argument
36 	struct gpio_mmio32_context *context = dev->data;  in gpio_mmio32_config()
37 	const struct gpio_mmio32_config *config = context->config;  in gpio_mmio32_config()
39 	if ((config->mask & (1 << pin)) == 0) {  in gpio_mmio32_config()
40 		return -EINVAL; /* Pin not in our validity mask */  in gpio_mmio32_config()
47 		return -ENOTSUP;  in gpio_mmio32_config()
52 		volatile uint32_t *reg = config->reg;  in gpio_mmio32_config()
56 			*reg = (*reg | (1 << pin));  in gpio_mmio32_config()
58 			*reg = (*reg & (config->mask & ~(1 << pin)));  in gpio_mmio32_config()
68 	struct gpio_mmio32_context *context = dev->data;  in gpio_mmio32_port_get_raw()
69 	const struct gpio_mmio32_config *config = context->config;  in gpio_mmio32_port_get_raw()
71 	*value = *config->reg & config->mask;  in gpio_mmio32_port_get_raw()
77 					   uint32_t mask,  in gpio_mmio32_port_set_masked_raw()  argument
80 	struct gpio_mmio32_context *context = dev->data;  in gpio_mmio32_port_set_masked_raw()
81 	const struct gpio_mmio32_config *config = context->config;  in gpio_mmio32_port_set_masked_raw()
82 	volatile uint32_t *reg = config->reg;  in gpio_mmio32_port_set_masked_raw()
85 	mask &= config->mask;  in gpio_mmio32_port_set_masked_raw()
86 	value &= mask;  in gpio_mmio32_port_set_masked_raw()
88 	/* Update pin state atomically */  in gpio_mmio32_port_set_masked_raw()
90 	*reg = (*reg & ~mask) | value;  in gpio_mmio32_port_set_masked_raw()
97 					 uint32_t mask)  in gpio_mmio32_port_set_bits_raw()  argument
99 	struct gpio_mmio32_context *context = dev->data;  in gpio_mmio32_port_set_bits_raw()
100 	const struct gpio_mmio32_config *config = context->config;  in gpio_mmio32_port_set_bits_raw()
101 	volatile uint32_t *reg = config->reg;  in gpio_mmio32_port_set_bits_raw()
104 	mask &= config->mask;  in gpio_mmio32_port_set_bits_raw()
106 	/* Update pin state atomically */  in gpio_mmio32_port_set_bits_raw()
108 	*reg = (*reg | mask);  in gpio_mmio32_port_set_bits_raw()
115 					   uint32_t mask)  in gpio_mmio32_port_clear_bits_raw()  argument
117 	struct gpio_mmio32_context *context = dev->data;  in gpio_mmio32_port_clear_bits_raw()
118 	const struct gpio_mmio32_config *config = context->config;  in gpio_mmio32_port_clear_bits_raw()
119 	volatile uint32_t *reg = config->reg;  in gpio_mmio32_port_clear_bits_raw()
122 	mask &= config->mask;  in gpio_mmio32_port_clear_bits_raw()
124 	/* Update pin state atomically */  in gpio_mmio32_port_clear_bits_raw()
126 	*reg = (*reg & ~mask);  in gpio_mmio32_port_clear_bits_raw()
133 					uint32_t mask)  in gpio_mmio32_port_toggle_bits()  argument
135 	struct gpio_mmio32_context *context = dev->data;  in gpio_mmio32_port_toggle_bits()
136 	const struct gpio_mmio32_config *config = context->config;  in gpio_mmio32_port_toggle_bits()
137 	volatile uint32_t *reg = config->reg;  in gpio_mmio32_port_toggle_bits()
140 	mask &= config->mask;  in gpio_mmio32_port_toggle_bits()
142 	/* Update pin state atomically */  in gpio_mmio32_port_toggle_bits()
144 	*reg = (*reg ^ mask);  in gpio_mmio32_port_toggle_bits()
161 	struct gpio_mmio32_context *context = dev->data;  in gpio_mmio32_init()
162 	const struct gpio_mmio32_config *config = dev->config;  in gpio_mmio32_init()
164 	context->config = config;  in gpio_mmio32_init()