Lines Matching refs:regs
165 static inline mm_reg_t regs(const struct device *dev) in regs() function
197 val = sys_read32(regs(dev) + offset); in check_perm()
209 val = sys_read32(regs(dev) + offset); in check_perm()
238 reg = regs(dev) + REG_GPI_INT_STS_BASE_GET(data) + GPIO_INTERRUPT_BASE_GET(cfg); in gpio_intel_isr()
275 reg = regs(dev) + data->pad_base + (raw_pin * PIN_OFFSET); in gpio_intel_config()
351 reg = regs(dev) + REG_PAD_HOST_SW_OWNER_GET(data) + GPIO_BASE_GET(dev); in gpio_intel_pin_interrupt_configure()
356 reg = regs(dev) + data->pad_base + (raw_pin * PIN_OFFSET); in gpio_intel_pin_interrupt_configure()
361 reg_en = regs(dev) + REG_GPI_INT_EN_BASE_GET(data) + GPIO_BASE_GET(dev); in gpio_intel_pin_interrupt_configure()
367 reg_sts = regs(dev) + REG_GPI_INT_STS_BASE_GET(data) + GPIO_BASE_GET(dev); in gpio_intel_pin_interrupt_configure()
459 reg_addr = regs(dev) + data->pad_base + (raw_pin * PIN_OFFSET); in port_get_raw()
491 reg_addr = regs(dev) + data->pad_base + (raw_pin * PIN_OFFSET); in port_set_raw()
599 sys_bitfield_clear_bit(regs(dev) + REG_MISCCFG, MISCCFG_IRQ_ROUTE_POS); in gpio_intel_acpi_enum()
668 sys_bitfield_clear_bit(regs(dev) + REG_MISCCFG, in gpio_intel_dts_init()