Lines Matching refs:cfg0
259 uint32_t raw_pin, reg, cfg0, cfg1; in gpio_intel_config() local
276 cfg0 = sys_read32(reg); in gpio_intel_config()
280 cfg0 &= ~(PAD_CFG0_RXRAW1); in gpio_intel_config()
285 cfg0 &= ~PAD_CFG0_RXDIS; in gpio_intel_config()
288 cfg0 |= PAD_CFG0_RXDIS; in gpio_intel_config()
296 cfg0 |= PAD_CFG0_TXSTATE; in gpio_intel_config()
298 cfg0 &= ~PAD_CFG0_TXSTATE; in gpio_intel_config()
302 cfg0 &= ~PAD_CFG0_TXDIS; in gpio_intel_config()
305 cfg0 |= PAD_CFG0_TXDIS; in gpio_intel_config()
322 sys_write32(cfg0, reg); in gpio_intel_config()
334 uint32_t raw_pin, cfg0, cfg1; in gpio_intel_pin_interrupt_configure() local
358 cfg0 = sys_read32(reg); in gpio_intel_pin_interrupt_configure()
371 cfg0 &= ~PAD_CFG0_RXEVCFG_MASK; in gpio_intel_pin_interrupt_configure()
375 cfg0 |= PAD_CFG0_RXEVCFG_DRIVE0; in gpio_intel_pin_interrupt_configure()
378 if ((cfg0 & PAD_CFG0_RXDIS) != 0U) { in gpio_intel_pin_interrupt_configure()
389 if ((cfg0 & PAD_CFG0_TXDIS) == 0U) { in gpio_intel_pin_interrupt_configure()
395 cfg0 |= PAD_CFG0_RXEVCFG_LEVEL; in gpio_intel_pin_interrupt_configure()
398 cfg0 |= PAD_CFG0_RXEVCFG_EDGE; in gpio_intel_pin_interrupt_configure()
403 cfg0 |= PAD_CFG0_RXINV; in gpio_intel_pin_interrupt_configure()
405 cfg0 &= ~PAD_CFG0_RXINV; in gpio_intel_pin_interrupt_configure()
410 sys_write32(cfg0, reg); in gpio_intel_pin_interrupt_configure()