2  * Copyright (c) 2018-2019, NXP
4  * SPDX-License-Identifier: Apache-2.0
10 #include <zephyr/device.h>
11 #include <zephyr/drivers/gpio.h>
12 #include <zephyr/irq.h>
14 #include <zephyr/sys/util.h>
17 #include <zephyr/drivers/pinctrl.h>
19 #include <zephyr/drivers/gpio/gpio_utils.h>
24 	GPIO_Type *base;  member
39 	const struct imx_gpio_config *config = port->config;  in imx_gpio_configure()
40 	GPIO_Type *base = config->base;  in imx_gpio_configure()  local
43 		return -ENOTSUP;  in imx_gpio_configure()
45 	__ASSERT_NO_MSG(pin < config->mux_count);  in imx_gpio_configure()
50 		(volatile uint32_t *)config->pin_muxes[pin].config_register;  in imx_gpio_configure()
62 		return -ENOTSUP;  in imx_gpio_configure()
84 	__ASSERT_NO_MSG(pin < config->mux_count);  in imx_gpio_configure()
86 	memcpy(&pin_cfg.pinmux, &config->pin_muxes[pin], sizeof(pin_cfg.pinmux));  in imx_gpio_configure()
95 	GPIO_SetPinIntMode(base, pin, false);  in imx_gpio_configure()
96 	GPIO_SetIntEdgeSelect(base, pin, false);  in imx_gpio_configure()
101 			GPIO_WritePinOutput(base, pin, gpioPinClear);  in imx_gpio_configure()
103 			GPIO_WritePinOutput(base, pin, gpioPinSet);  in imx_gpio_configure()
107 		WRITE_BIT(base->GDIR, pin, 1U);  in imx_gpio_configure()
110 		WRITE_BIT(base->GDIR, pin, 0U);  in imx_gpio_configure()
120 	const struct imx_gpio_config *config = port->config;  in imx_gpio_port_get_raw()
121 	GPIO_Type *base = config->base;  in imx_gpio_port_get_raw()  local
123 	*value = GPIO_ReadPortInput(base);  in imx_gpio_port_get_raw()
132 	const struct imx_gpio_config *config = port->config;  in imx_gpio_port_set_masked_raw()
133 	GPIO_Type *base = config->base;  in imx_gpio_port_set_masked_raw()  local
136 	GPIO_WritePortOutput(base,  in imx_gpio_port_set_masked_raw()
137 			(GPIO_ReadPortInput(base) & ~mask) | (value & mask));  in imx_gpio_port_set_masked_raw()
146 	const struct imx_gpio_config *config = port->config;  in imx_gpio_port_set_bits_raw()
147 	GPIO_Type *base = config->base;  in imx_gpio_port_set_bits_raw()  local
150 	GPIO_WritePortOutput(base, GPIO_ReadPortInput(base) | pins);  in imx_gpio_port_set_bits_raw()
159 	const struct imx_gpio_config *config = port->config;  in imx_gpio_port_clear_bits_raw()
160 	GPIO_Type *base = config->base;  in imx_gpio_port_clear_bits_raw()  local
163 	GPIO_WritePortOutput(base, GPIO_ReadPortInput(base) & ~pins);  in imx_gpio_port_clear_bits_raw()
172 	const struct imx_gpio_config *config = port->config;  in imx_gpio_port_toggle_bits()
173 	GPIO_Type *base = config->base;  in imx_gpio_port_toggle_bits()  local
176 	GPIO_WritePortOutput(base, GPIO_ReadPortInput(base) ^ pins);  in imx_gpio_port_toggle_bits()
187 	const struct imx_gpio_config *config = port->config;  in imx_gpio_pin_interrupt_configure()
188 	GPIO_Type *base = config->base;  in imx_gpio_pin_interrupt_configure()  local
194 	if (((base->GDIR & BIT(pin)) != 0U)  in imx_gpio_pin_interrupt_configure()
197 		return -ENOTSUP;  in imx_gpio_pin_interrupt_configure()
214 		icr_reg = &(base->ICR1);  in imx_gpio_pin_interrupt_configure()
216 		shift = 2U * (pin - 16U);  in imx_gpio_pin_interrupt_configure()
217 		icr_reg = &(base->ICR2);  in imx_gpio_pin_interrupt_configure()
219 		return -EINVAL;  in imx_gpio_pin_interrupt_configure()
226 	WRITE_BIT(base->EDGE_SEL, pin, trig == GPIO_INT_TRIG_BOTH);  in imx_gpio_pin_interrupt_configure()
227 	WRITE_BIT(base->ISR, pin, mode != GPIO_INT_MODE_DISABLED);  in imx_gpio_pin_interrupt_configure()
228 	WRITE_BIT(base->IMR, pin, mode != GPIO_INT_MODE_DISABLED);  in imx_gpio_pin_interrupt_configure()
238 	struct imx_gpio_data *data = port->data;  in imx_gpio_manage_callback()
240 	return gpio_manage_callback(&data->callbacks, cb, set);  in imx_gpio_manage_callback()
245 	const struct imx_gpio_config *config = port->config;  in imx_gpio_port_isr()
246 	struct imx_gpio_data *data = port->data;  in imx_gpio_port_isr()
249 	int_status = config->base->ISR & config->base->IMR;  in imx_gpio_port_isr()
251 	config->base->ISR = int_status;  in imx_gpio_port_isr()
253 	gpio_fire_callbacks(&data->callbacks, port, int_status);  in imx_gpio_port_isr()
286 		.base = (GPIO_Type *)DT_INST_REG_ADDR(n),		\