Lines Matching +full:gd32 +full:- +full:afio

4  * SPDX-License-Identifier: Apache-2.0
11 #include <zephyr/drivers/clock_control/gd32.h>
23 /** AFIO DT node */
24 #define AFIO_NODE DT_NODELABEL(afio)
30 /** GPIO mode: input with pull-up/down (CTL bits) */
32 /** GPIO mode: output push-pull @ 2MHz (CTL bits) */
34 /** GPIO mode: output open-drain @ 2MHz (CTL bits) */
67 struct gpio_gd32_data *data = dev->data; in gpio_gd32_isr()
69 gpio_fire_callbacks(&data->callbacks, dev, BIT(line)); in gpio_gd32_isr()
79 * @retval -EINVAL if pin is not valid.
84 const struct gpio_gd32_config *config = port->config; in gpio_gd32_configure_extiss()
117 return -EINVAL; in gpio_gd32_configure_extiss()
120 port_index = (config->reg - GPIOA) / (GPIOB - GPIOA); in gpio_gd32_configure_extiss()
132 const struct gpio_gd32_config *config = port->config; in gpio_gd32_configure()
137 ctl = GPIO_CTL(config->reg); in gpio_gd32_configure()
140 pupd = GPIO_PUD(config->reg); in gpio_gd32_configure()
148 GPIO_OMODE(config->reg) |= BIT(pin); in gpio_gd32_configure()
150 return -ENOTSUP; in gpio_gd32_configure()
153 GPIO_OMODE(config->reg) &= ~BIT(pin); in gpio_gd32_configure()
157 GPIO_BOP(config->reg) = BIT(pin); in gpio_gd32_configure()
159 GPIO_BC(config->reg) = BIT(pin); in gpio_gd32_configure()
175 GPIO_PUD(config->reg) = pupd; in gpio_gd32_configure()
176 GPIO_CTL(config->reg) = ctl; in gpio_gd32_configure()
184 ctl_reg = &GPIO_CTL0(config->reg); in gpio_gd32_configure()
186 ctl_reg = &GPIO_CTL1(config->reg); in gpio_gd32_configure()
187 pin -= 8U; in gpio_gd32_configure()
198 return -ENOTSUP; in gpio_gd32_configure()
205 GPIO_BOP(config->reg) = pin_bit; in gpio_gd32_configure()
207 GPIO_BC(config->reg) = pin_bit; in gpio_gd32_configure()
212 GPIO_BOP(config->reg) = pin_bit; in gpio_gd32_configure()
215 GPIO_BC(config->reg) = pin_bit; in gpio_gd32_configure()
231 const struct gpio_gd32_config *config = port->config; in gpio_gd32_port_get_raw()
233 *value = GPIO_ISTAT(config->reg); in gpio_gd32_port_get_raw()
242 const struct gpio_gd32_config *config = port->config; in gpio_gd32_port_set_masked_raw()
244 GPIO_OCTL(config->reg) = in gpio_gd32_port_set_masked_raw()
245 (GPIO_OCTL(config->reg) & ~mask) | (value & mask); in gpio_gd32_port_set_masked_raw()
253 const struct gpio_gd32_config *config = port->config; in gpio_gd32_port_set_bits_raw()
255 GPIO_BOP(config->reg) = pins; in gpio_gd32_port_set_bits_raw()
263 const struct gpio_gd32_config *config = port->config; in gpio_gd32_port_clear_bits_raw()
265 GPIO_BC(config->reg) = pins; in gpio_gd32_port_clear_bits_raw()
273 const struct gpio_gd32_config *config = port->config; in gpio_gd32_port_toggle_bits()
276 GPIO_TG(config->reg) = pins; in gpio_gd32_port_toggle_bits()
278 GPIO_OCTL(config->reg) ^= pins; in gpio_gd32_port_toggle_bits()
317 return -ENOTSUP; in gpio_gd32_pin_interrupt_configure()
322 return -ENOTSUP; in gpio_gd32_pin_interrupt_configure()
331 struct gpio_gd32_data *data = dev->data; in gpio_gd32_manage_callback()
333 return gpio_manage_callback(&data->callbacks, callback, set); in gpio_gd32_manage_callback()
349 const struct gpio_gd32_config *config = port->config; in gpio_gd32_init()
352 (clock_control_subsys_t)&config->clkid); in gpio_gd32_init()
354 (clock_control_subsys_t)&config->clkid_exti); in gpio_gd32_init()
356 (void)reset_line_toggle_dt(&config->reset); in gpio_gd32_init()