38 static inline uint32_t dw_read(uint32_t base_addr, uint32_t offset)  in dw_read()  argument
40 	return sys_in32(base_addr + offset);  in dw_read()
43 static inline void dw_write(uint32_t base_addr, uint32_t offset,  in dw_write()  argument
46 	sys_out32(val, base_addr + offset);  in dw_write()
49 static void dw_set_bit(uint32_t base_addr, uint32_t offset,  in dw_set_bit()  argument
53 		sys_io_clear_bit(base_addr + offset, bit);  in dw_set_bit()
55 		sys_io_set_bit(base_addr + offset, bit);  in dw_set_bit()
59 static inline uint32_t dw_read(uint32_t base_addr, uint32_t offset)  in dw_read()  argument
61 	return sys_read32(base_addr + offset);  in dw_read()
64 static inline void dw_write(uint32_t base_addr, uint32_t offset,  in dw_write()  argument
67 	sys_write32(val, base_addr + offset);  in dw_write()
70 static void dw_set_bit(uint32_t base_addr, uint32_t offset,  in dw_set_bit()  argument
74 		sys_clear_bit(base_addr + offset, bit);  in dw_set_bit()
76 		sys_set_bit(base_addr + offset, bit);  in dw_set_bit()
81 static inline int dw_base_to_block_base(uint32_t base_addr)  in dw_base_to_block_base()  argument
83 	return (base_addr & 0xFFFFFFC0);  in dw_base_to_block_base()
86 static inline int dw_derive_port_from_base(uint32_t base_addr)  in dw_derive_port_from_base()  argument
88 	uint32_t port = (base_addr & 0x3f) / 12U;  in dw_derive_port_from_base()
97 static inline uint32_t dw_get_ext_port(uint32_t base_addr)  in dw_get_ext_port()  argument
102 	switch (dw_derive_port_from_base(base_addr)) {  in dw_get_ext_port()
121 static inline uint32_t dw_get_data_port(uint32_t base_addr)  in dw_get_data_port()  argument
126 	switch (dw_derive_port_from_base(base_addr)) {  in dw_get_data_port()
145 static inline uint32_t dw_get_dir_port(uint32_t base_addr)  in dw_get_dir_port()  argument
150 	switch (dw_derive_port_from_base(base_addr)) {  in dw_get_dir_port()
176 	uint32_t base_addr = dw_base_to_block_base(context->base_addr);  in gpio_dw_pin_interrupt_configure()  local
177 	uint32_t port_base_addr = context->base_addr;  in gpio_dw_pin_interrupt_configure()
199 		dir_reg = dw_read(base_addr, dir_port) & BIT(pin);  in gpio_dw_pin_interrupt_configure()
212 	dw_set_bit(base_addr, INTEN, pin, false);  in gpio_dw_pin_interrupt_configure()
215 	dw_set_bit(base_addr, INTMASK, pin, true);  in gpio_dw_pin_interrupt_configure()
216 	dw_write(base_addr, PORTA_EOI, BIT(pin));  in gpio_dw_pin_interrupt_configure()
220 		dw_set_bit(base_addr, INTTYPE_LEVEL, pin,  in gpio_dw_pin_interrupt_configure()
224 		dw_set_bit(base_addr, INT_POLARITY, pin,  in gpio_dw_pin_interrupt_configure()
228 		dw_set_bit(base_addr, INTEN, pin, true);  in gpio_dw_pin_interrupt_configure()
229 		dw_set_bit(base_addr, INTMASK, pin, false);  in gpio_dw_pin_interrupt_configure()
240 	uint32_t base_addr = dw_base_to_block_base(context->base_addr);  in dw_pin_config()  local
241 	uint32_t port_base_addr = context->base_addr;  in dw_pin_config()
248 	dw_set_bit(base_addr, dir_port, pin, pin_is_output);  in dw_pin_config()
264 		dw_set_bit(base_addr, PORTA_DEBOUNCE, pin, need_debounce);  in dw_pin_config()
307 	uint32_t base_addr = dw_base_to_block_base(context->base_addr);  in gpio_dw_port_get_raw()  local
308 	uint32_t port_base_addr = context->base_addr;  in gpio_dw_port_get_raw()
311 	*value = dw_read(base_addr, ext_port);  in gpio_dw_port_get_raw()
320 	uint32_t base_addr = dw_base_to_block_base(context->base_addr);  in gpio_dw_port_set_masked_raw()  local
321 	uint32_t port_base_addr = context->base_addr;  in gpio_dw_port_set_masked_raw()
325 	pins = dw_read(base_addr, data_port);  in gpio_dw_port_set_masked_raw()
327 	dw_write(base_addr, data_port, pins);  in gpio_dw_port_set_masked_raw()
335 	uint32_t base_addr = dw_base_to_block_base(context->base_addr);  in gpio_dw_port_set_bits_raw()  local
336 	uint32_t port_base_addr = context->base_addr;  in gpio_dw_port_set_bits_raw()
340 	pins = dw_read(base_addr, data_port);  in gpio_dw_port_set_bits_raw()
342 	dw_write(base_addr, data_port, pins);  in gpio_dw_port_set_bits_raw()
351 	uint32_t base_addr = dw_base_to_block_base(context->base_addr);  in gpio_dw_port_clear_bits_raw()  local
352 	uint32_t port_base_addr = context->base_addr;  in gpio_dw_port_clear_bits_raw()
356 	pins = dw_read(base_addr, data_port);  in gpio_dw_port_clear_bits_raw()
358 	dw_write(base_addr, data_port, pins);  in gpio_dw_port_clear_bits_raw()
366 	uint32_t base_addr = dw_base_to_block_base(context->base_addr);  in gpio_dw_port_toggle_bits()  local
367 	uint32_t port_base_addr = context->base_addr;  in gpio_dw_port_toggle_bits()
371 	pins = dw_read(base_addr, data_port);  in gpio_dw_port_toggle_bits()
373 	dw_write(base_addr, data_port, pins);  in gpio_dw_port_toggle_bits()
391 	uint32_t base_addr = dw_base_to_block_base(context->base_addr);  in gpio_dw_isr()  local
394 	int_status = dw_read(base_addr, INTSTATUS);  in gpio_dw_isr()
396 	dw_write(base_addr, PORTA_EOI, int_status);  in gpio_dw_isr()
417 	uint32_t base_addr;  in gpio_dw_initialize()  local
421 		base_addr = dw_base_to_block_base(context->base_addr);  in gpio_dw_initialize()
424 		dw_set_bit(base_addr, INT_CLOCK_SYNC, LS_SYNC_POS, 1);  in gpio_dw_initialize()
427 		dw_write(base_addr, INTMASK, ~(0));  in gpio_dw_initialize()
428 		dw_write(base_addr, INTEN, 0);  in gpio_dw_initialize()
429 		dw_write(base_addr, PORTA_EOI, ~(0));  in gpio_dw_initialize()
464 		.base_addr = DT_INST_REG_ADDR(n),						\