4  * SPDX-License-Identifier: Apache-2.0
24 /** Cache of the output configuration and data of the pins. */
26 	uint8_t dir;  member
40 /** Configuration data */
60 	rc = i2c_reg_write_byte_dt(&cfg->i2c, CY8C95XX_REG_OUTPUT_DATA0 + cfg->port_num,  in write_pin_state()
61 				   pins->data_out);  in write_pin_state()
66 	rc = i2c_reg_write_byte_dt(&cfg->i2c, CY8C95XX_REG_PORT_SELECT, cfg->port_num);  in write_pin_state()
71 	rc = i2c_reg_write_byte_dt(&cfg->i2c, CY8C95XX_REG_DIR, pins->dir);  in write_pin_state()
76 	rc = i2c_reg_write_byte_dt(&cfg->i2c, CY8C95XX_REG_PULL_UP, pins->pull_up);  in write_pin_state()
81 	rc = i2c_reg_write_byte_dt(&cfg->i2c, CY8C95XX_REG_PULL_DOWN, pins->pull_down);  in write_pin_state()
90 	const struct cy8c95xx_config *cfg = dev->config;  in cy8c95xx_config()
91 	struct cy8c95xx_drv_data *drv_data = dev->data;  in cy8c95xx_config()
92 	struct cy8c95xx_pin_state *pins = &drv_data->pin_state;  in cy8c95xx_config()
98 		return -EWOULDBLOCK;  in cy8c95xx_config()
101 	/* Open-drain not implemented */  in cy8c95xx_config()
103 		return -ENOTSUP;  in cy8c95xx_config()
106 	WRITE_BIT(pins->pull_up, pin, (flags & GPIO_PULL_UP) != 0U);  in cy8c95xx_config()
107 	WRITE_BIT(pins->pull_down, pin, (flags & GPIO_PULL_DOWN) != 0U);  in cy8c95xx_config()
112 		return -ENOTSUP;  in cy8c95xx_config()
115 	k_sem_take(drv_data->lock, K_FOREVER);  in cy8c95xx_config()
118 		pins->dir &= ~BIT(pin);  in cy8c95xx_config()
120 			pins->data_out &= ~BIT(pin);  in cy8c95xx_config()
122 			pins->data_out |= BIT(pin);  in cy8c95xx_config()
125 		pins->dir |= BIT(pin);  in cy8c95xx_config()
128 	LOG_DBG("CFG %u %x : DIR %04x ; DAT %04x",  in cy8c95xx_config()
129 		pin, flags, pins->dir, pins->data_out);  in cy8c95xx_config()
133 	k_sem_give(drv_data->lock);  in cy8c95xx_config()
140 	const struct cy8c95xx_config *cfg = dev->config;  in port_get()
141 	struct cy8c95xx_drv_data *drv_data = dev->data;  in port_get()
147 		return -EWOULDBLOCK;  in port_get()
150 	k_sem_take(drv_data->lock, K_FOREVER);  in port_get()
152 	rc = i2c_reg_read_byte_dt(&cfg->i2c, CY8C95XX_REG_INPUT_DATA0 + cfg->port_num, &pin_data);  in port_get()
158 	k_sem_give(drv_data->lock);  in port_get()
167 	const struct cy8c95xx_config *cfg = dev->config;  in port_write()
168 	struct cy8c95xx_drv_data *drv_data = dev->data;  in port_write()
169 	uint8_t *outp = &drv_data->pin_state.data_out;  in port_write()
174 		return -EWOULDBLOCK;  in port_write()
177 	k_sem_take(drv_data->lock, K_FOREVER);  in port_write()
179 	int rc = i2c_reg_write_byte_dt(&cfg->i2c, CY8C95XX_REG_OUTPUT_DATA0 + cfg->port_num, out);  in port_write()
184 	k_sem_give(drv_data->lock);  in port_write()
225 	const struct cy8c95xx_config *cfg = dev->config;  in cy8c95xx_init()
226 	struct cy8c95xx_drv_data *drv_data = dev->data;  in cy8c95xx_init()
230 	k_sem_take(drv_data->lock, K_FOREVER);  in cy8c95xx_init()
232 	if (!device_is_ready(cfg->i2c.bus)) {  in cy8c95xx_init()
233 		LOG_ERR("%s is not ready", cfg->i2c.bus->name);  in cy8c95xx_init()
234 		rc = -ENODEV;  in cy8c95xx_init()
238 	rc = i2c_reg_read_byte_dt(&cfg->i2c, CY8C95XX_REG_ID, &data);  in cy8c95xx_init()
244 		LOG_WRN("driver only support [0-2] ports operations");  in cy8c95xx_init()
247 	/* Reset state mediated by initial configuration */  in cy8c95xx_init()
248 	drv_data->pin_state = (struct cy8c95xx_pin_state) {  in cy8c95xx_init()
249 		.dir = 0xFF,  in cy8c95xx_init()
254 	rc = write_pin_state(cfg, &drv_data->pin_state);  in cy8c95xx_init()
257 		LOG_ERR("%s init failed: %d", dev->name, rc);  in cy8c95xx_init()
259 		LOG_DBG("%s init ok", dev->name);  in cy8c95xx_init()
261 	k_sem_give(drv_data->lock);  in cy8c95xx_init()