Lines Matching +full:pin +full:- +full:mask
4 * SPDX-License-Identifier: Apache-2.0
22 #include <driverlib/pin.h>
64 uint32_t mask);
66 uint32_t mask);
69 gpio_pin_t pin, in gpio_cc32xx_config() argument
72 const struct gpio_cc32xx_config *gpio_config = port->config; in gpio_cc32xx_config()
73 unsigned long port_base = gpio_config->port_base; in gpio_cc32xx_config()
76 return -ENOTSUP; in gpio_cc32xx_config()
80 return -ENOTSUP; in gpio_cc32xx_config()
84 return -ENOTSUP; in gpio_cc32xx_config()
87 MAP_PinTypeGPIO(pinTable[gpio_config->port_num * 8 + pin], in gpio_cc32xx_config()
90 MAP_GPIODirModeSet(port_base, (1 << pin), GPIO_DIR_MODE_OUT); in gpio_cc32xx_config()
92 gpio_cc32xx_port_set_bits_raw(port, BIT(pin)); in gpio_cc32xx_config()
94 gpio_cc32xx_port_clear_bits_raw(port, BIT(pin)); in gpio_cc32xx_config()
97 MAP_GPIODirModeSet(port_base, (1 << pin), GPIO_DIR_MODE_IN); in gpio_cc32xx_config()
106 const struct gpio_cc32xx_config *gpio_config = port->config; in gpio_cc32xx_port_get_raw()
107 unsigned long port_base = gpio_config->port_base; in gpio_cc32xx_port_get_raw()
116 uint32_t mask, in gpio_cc32xx_port_set_masked_raw() argument
119 const struct gpio_cc32xx_config *gpio_config = port->config; in gpio_cc32xx_port_set_masked_raw()
120 unsigned long port_base = gpio_config->port_base; in gpio_cc32xx_port_set_masked_raw()
122 MAP_GPIOPinWrite(port_base, (unsigned char)mask, (unsigned char)value); in gpio_cc32xx_port_set_masked_raw()
128 uint32_t mask) in gpio_cc32xx_port_set_bits_raw() argument
130 const struct gpio_cc32xx_config *gpio_config = port->config; in gpio_cc32xx_port_set_bits_raw()
131 unsigned long port_base = gpio_config->port_base; in gpio_cc32xx_port_set_bits_raw()
133 MAP_GPIOPinWrite(port_base, (unsigned char)mask, (unsigned char)mask); in gpio_cc32xx_port_set_bits_raw()
139 uint32_t mask) in gpio_cc32xx_port_clear_bits_raw() argument
141 const struct gpio_cc32xx_config *gpio_config = port->config; in gpio_cc32xx_port_clear_bits_raw()
142 unsigned long port_base = gpio_config->port_base; in gpio_cc32xx_port_clear_bits_raw()
144 MAP_GPIOPinWrite(port_base, (unsigned char)mask, (unsigned char)~mask); in gpio_cc32xx_port_clear_bits_raw()
150 uint32_t mask) in gpio_cc32xx_port_toggle_bits() argument
152 const struct gpio_cc32xx_config *gpio_config = port->config; in gpio_cc32xx_port_toggle_bits()
153 unsigned long port_base = gpio_config->port_base; in gpio_cc32xx_port_toggle_bits()
156 value = MAP_GPIOPinRead(port_base, mask); in gpio_cc32xx_port_toggle_bits()
158 MAP_GPIOPinWrite(port_base, (unsigned char)mask, in gpio_cc32xx_port_toggle_bits()
165 gpio_pin_t pin, in gpio_cc32xx_pin_interrupt_configure() argument
169 const struct gpio_cc32xx_config *gpio_config = port->config; in gpio_cc32xx_pin_interrupt_configure()
170 unsigned long port_base = gpio_config->port_base; in gpio_cc32xx_pin_interrupt_configure()
173 __ASSERT(pin < 8, "Invalid pin number - only 8 pins per port"); in gpio_cc32xx_pin_interrupt_configure()
178 * to level-based in gpio_cc32xx_pin_interrupt_configure()
180 MAP_GPIOIntDisable(port_base, (1 << pin)); in gpio_cc32xx_pin_interrupt_configure()
199 MAP_GPIOIntTypeSet(port_base, (1 << pin), int_type); in gpio_cc32xx_pin_interrupt_configure()
200 MAP_GPIOIntClear(port_base, (1 << pin)); in gpio_cc32xx_pin_interrupt_configure()
201 MAP_GPIOIntEnable(port_base, (1 << pin)); in gpio_cc32xx_pin_interrupt_configure()
211 struct gpio_cc32xx_data *data = dev->data; in gpio_cc32xx_manage_callback()
213 return gpio_manage_callback(&data->callbacks, callback, set); in gpio_cc32xx_manage_callback()
218 const struct gpio_cc32xx_config *config = dev->config; in gpio_cc32xx_port_isr()
219 struct gpio_cc32xx_data *data = dev->data; in gpio_cc32xx_port_isr()
223 int_status = (uint32_t)MAP_GPIOIntStatus(config->port_base, 1); in gpio_cc32xx_port_isr()
226 MAP_GPIOIntClear(config->port_base, int_status); in gpio_cc32xx_port_isr()
229 gpio_fire_callbacks(&data->callbacks, dev, int_status); in gpio_cc32xx_port_isr()