Lines Matching +full:gpio +full:- +full:group
3 * SPDX-License-Identifier: Apache-2.0
10 #include <zephyr/drivers/gpio.h>
11 #include <zephyr/drivers/gpio/gpio_utils.h>
42 #define DEV_CFG(dev) ((const struct gpio_bcm2711_config *const)(dev)->config)
43 #define DEV_DATA(dev) ((struct gpio_bcm2711_data *const)(dev)->data)
45 #define RPI_PIN_NUM(dev, n) (DEV_CFG(dev)->offset + n)
72 uint32_t group; in gpio_bcm2711_pin_configure() local
77 return -ENOTSUP; in gpio_bcm2711_pin_configure()
82 group = GPIO_REG_GROUP(RPI_PIN_NUM(port, pin), FSEL_GROUPS); in gpio_bcm2711_pin_configure()
85 regval = sys_read32(GPFSEL(data->base, group)); in gpio_bcm2711_pin_configure()
90 sys_write32(regval, GPFSEL(data->base, group)); in gpio_bcm2711_pin_configure()
95 group = GPIO_REG_GROUP(RPI_PIN_NUM(port, pin), IO_GROUPS); in gpio_bcm2711_pin_configure()
99 regval = sys_read32(GPSET(data->base, group)); in gpio_bcm2711_pin_configure()
101 sys_write32(regval, GPSET(data->base, group)); in gpio_bcm2711_pin_configure()
103 regval = sys_read32(GPCLR(data->base, group)); in gpio_bcm2711_pin_configure()
105 sys_write32(regval, GPCLR(data->base, group)); in gpio_bcm2711_pin_configure()
111 group = GPIO_REG_GROUP(RPI_PIN_NUM(port, pin), PULL_GROUPS); in gpio_bcm2711_pin_configure()
114 regval = sys_read32(GPPULL(data->base, group)); in gpio_bcm2711_pin_configure()
121 sys_write32(regval, GPPULL(data->base, group)); in gpio_bcm2711_pin_configure()
133 regval = ((uint64_t)sys_read32(GPLEV(data->base, 0))) | in gpio_bcm2711_port_get_raw()
134 ((uint64_t)sys_read32(GPLEV(data->base, 1)) << 32); in gpio_bcm2711_port_get_raw()
136 *value = (regval >> cfg->offset) & BIT_MASK(cfg->ngpios); in gpio_bcm2711_port_get_raw()
149 value &= BIT_MASK(cfg->ngpios); in gpio_bcm2711_port_set_masked_raw()
150 mask &= BIT_MASK(cfg->ngpios); in gpio_bcm2711_port_set_masked_raw()
152 regval = (uint64_t)value << cfg->offset; in gpio_bcm2711_port_set_masked_raw()
153 regmask = (uint64_t)mask << cfg->offset; in gpio_bcm2711_port_set_masked_raw()
158 sys_write32(FROM_U64(set, 0), GPSET(data->base, 0)); in gpio_bcm2711_port_set_masked_raw()
159 sys_write32(FROM_U64(clr, 0), GPCLR(data->base, 0)); in gpio_bcm2711_port_set_masked_raw()
160 sys_write32(FROM_U64(set, 1), GPSET(data->base, 1)); in gpio_bcm2711_port_set_masked_raw()
161 sys_write32(FROM_U64(clr, 1), GPCLR(data->base, 1)); in gpio_bcm2711_port_set_masked_raw()
172 regval = ((uint64_t)pins & BIT_MASK(cfg->ngpios)) << cfg->offset; in gpio_bcm2711_port_set_bits_raw()
174 sys_write32(FROM_U64(regval, 0), GPSET(data->base, 0)); in gpio_bcm2711_port_set_bits_raw()
175 sys_write32(FROM_U64(regval, 1), GPSET(data->base, 1)); in gpio_bcm2711_port_set_bits_raw()
186 regval = ((uint64_t)pins & BIT_MASK(cfg->ngpios)) << cfg->offset; in gpio_bcm2711_port_clear_bits_raw()
188 sys_write32(FROM_U64(regval, 0), GPCLR(data->base, 0)); in gpio_bcm2711_port_clear_bits_raw()
189 sys_write32(FROM_U64(regval, 1), GPCLR(data->base, 1)); in gpio_bcm2711_port_clear_bits_raw()
201 regval = ((uint64_t)sys_read32(GPLEV(data->base, 0))) | in gpio_bcm2711_port_toggle_bits()
202 ((uint64_t)sys_read32(GPLEV(data->base, 1)) << 32); in gpio_bcm2711_port_toggle_bits()
204 regmask = ((uint64_t)pins & BIT_MASK(cfg->ngpios)) << cfg->offset; in gpio_bcm2711_port_toggle_bits()
209 sys_write32(FROM_U64(set, 0), GPSET(data->base, 0)); in gpio_bcm2711_port_toggle_bits()
210 sys_write32(FROM_U64(clr, 0), GPCLR(data->base, 0)); in gpio_bcm2711_port_toggle_bits()
211 sys_write32(FROM_U64(set, 1), GPSET(data->base, 1)); in gpio_bcm2711_port_toggle_bits()
212 sys_write32(FROM_U64(clr, 1), GPCLR(data->base, 1)); in gpio_bcm2711_port_toggle_bits()
221 uint32_t group; in gpio_bcm2711_pin_interrupt_configure() local
225 group = GPIO_REG_GROUP(RPI_PIN_NUM(port, pin), IO_GROUPS); in gpio_bcm2711_pin_interrupt_configure()
230 regval = sys_read32(GPREN(data->base, group)); in gpio_bcm2711_pin_interrupt_configure()
232 sys_write32(regval, GPREN(data->base, group)); in gpio_bcm2711_pin_interrupt_configure()
234 regval = sys_read32(GPFEN(data->base, group)); in gpio_bcm2711_pin_interrupt_configure()
236 sys_write32(regval, GPFEN(data->base, group)); in gpio_bcm2711_pin_interrupt_configure()
238 regval = sys_read32(GPHEN(data->base, group)); in gpio_bcm2711_pin_interrupt_configure()
240 sys_write32(regval, GPHEN(data->base, group)); in gpio_bcm2711_pin_interrupt_configure()
242 regval = sys_read32(GPLEN(data->base, group)); in gpio_bcm2711_pin_interrupt_configure()
244 sys_write32(regval, GPLEN(data->base, group)); in gpio_bcm2711_pin_interrupt_configure()
246 regval = sys_read32(GPAREN(data->base, group)); in gpio_bcm2711_pin_interrupt_configure()
248 sys_write32(regval, GPAREN(data->base, group)); in gpio_bcm2711_pin_interrupt_configure()
250 regval = sys_read32(GPAFEN(data->base, group)); in gpio_bcm2711_pin_interrupt_configure()
252 sys_write32(regval, GPAFEN(data->base, group)); in gpio_bcm2711_pin_interrupt_configure()
256 regval = sys_read32(GPLEN(data->base, group)); in gpio_bcm2711_pin_interrupt_configure()
258 sys_write32(regval, GPLEN(data->base, group)); in gpio_bcm2711_pin_interrupt_configure()
261 regval = sys_read32(GPHEN(data->base, group)); in gpio_bcm2711_pin_interrupt_configure()
263 sys_write32(regval, GPHEN(data->base, group)); in gpio_bcm2711_pin_interrupt_configure()
267 regval = sys_read32(GPAFEN(data->base, group)); in gpio_bcm2711_pin_interrupt_configure()
269 sys_write32(regval, GPAFEN(data->base, group)); in gpio_bcm2711_pin_interrupt_configure()
272 regval = sys_read32(GPAREN(data->base, group)); in gpio_bcm2711_pin_interrupt_configure()
274 sys_write32(regval, GPAREN(data->base, group)); in gpio_bcm2711_pin_interrupt_configure()
286 return gpio_manage_callback(&data->cb, cb, set); in gpio_bcm2711_manage_callback()
296 regval = ((uint64_t)sys_read32(GPEDS(data->base, 0))) | in gpio_bcm2711_isr()
297 ((uint64_t)sys_read32(GPEDS(data->base, 1)) << 32); in gpio_bcm2711_isr()
299 regval &= BIT_MASK(cfg->ngpios) << cfg->offset; in gpio_bcm2711_isr()
301 pins = (uint32_t)(regval >> cfg->offset); in gpio_bcm2711_isr()
302 gpio_fire_callbacks(&data->cb, port, pins); in gpio_bcm2711_isr()
305 sys_write32(FROM_U64(regval, 0), GPEDS(data->base, 0)); in gpio_bcm2711_isr()
306 sys_write32(FROM_U64(regval, 1), GPEDS(data->base, 1)); in gpio_bcm2711_isr()
315 data->base = DEVICE_MMIO_NAMED_GET(port, reg_base); in gpio_bcm2711_init()
317 cfg->irq_config_func(); in gpio_bcm2711_init()
322 static DEVICE_API(gpio, gpio_bcm2711_api) = {