4  * SPDX-License-Identifier: Apache-2.0
16 #include <zephyr/dt-bindings/gpio/andestech-atcgpio100.h>
36 #define REG_IMD0 0x54 /* Interrupt mode 0 ~ 7 reg.      */
37 #define REG_IMD1 0x58 /* Interrupt mode 8 ~ 15 reg.     */
38 #define REG_IMD2 0x5C /* Interrupt mode 16 ~ 23 reg.    */
39 #define REG_IMD3 0x60 /* Interrupt mode 24 ~ 31 reg.    */
41 #define REG_DEBE 0x70 /* De-bounce enable reg.          */
42 #define REG_DEBC 0x74 /* De-Bounce control reg.         */
56 	((const struct gpio_atcgpio100_config * const)(dev)->config)->base
72 #define SET_GPIO_INT_MODE(cur_val, mode, ch_idx)			\  argument
75 			cur_val |=  (mode << (ch_idx * 4));		\
94 	struct k_spinlock lock;  member
101 	struct gpio_atcgpio100_data * const data = port->data;  in gpio_atcgpio100_config()
111 		return -ENOTSUP;  in gpio_atcgpio100_config()
124 		key = k_spin_lock(&data->lock);  in gpio_atcgpio100_config()
130 		k_spin_unlock(&data->lock, key);  in gpio_atcgpio100_config()
135 			return -ENOTSUP;  in gpio_atcgpio100_config()
138 		key = k_spin_lock(&data->lock);  in gpio_atcgpio100_config()
140 		/* Set de-bounce */  in gpio_atcgpio100_config()
143 			 *  less than 4 de-bounce clock period  in gpio_atcgpio100_config()
154 		k_spin_unlock(&data->lock, key);  in gpio_atcgpio100_config()
157 		return -ENOTSUP;  in gpio_atcgpio100_config()
174 	struct gpio_atcgpio100_data * const data = port->data;  in gpio_atcgpio100_set_masked_raw()
177 	k_spinlock_key_t key = k_spin_lock(&data->lock);  in gpio_atcgpio100_set_masked_raw()
182 	k_spin_unlock(&data->lock, key);  in gpio_atcgpio100_set_masked_raw()
204 	struct gpio_atcgpio100_data * const data = port->data;  in gpio_atcgpio100_toggle_bits()
207 	k_spinlock_key_t key = k_spin_lock(&data->lock);  in gpio_atcgpio100_toggle_bits()
212 	k_spin_unlock(&data->lock, key);  in gpio_atcgpio100_toggle_bits()
220 					enum gpio_int_mode mode,  in gpio_atcgpio100_pin_interrupt_configure()  argument
223 	struct gpio_atcgpio100_data * const data = port->data;  in gpio_atcgpio100_pin_interrupt_configure()
227 	switch (mode | trig) {  in gpio_atcgpio100_pin_interrupt_configure()
251 	key = k_spin_lock(&data->lock);  in gpio_atcgpio100_pin_interrupt_configure()
262 		/* Set interrupt mode of pin */  in gpio_atcgpio100_pin_interrupt_configure()
272 	k_spin_unlock(&data->lock, key);  in gpio_atcgpio100_pin_interrupt_configure()
282 	struct gpio_atcgpio100_data * const data = port->data;  in gpio_atcgpio100_manage_callback()
284 	return gpio_manage_callback(&data->cb, callback, set);  in gpio_atcgpio100_manage_callback()
293 	const struct gpio_atcgpio100_config * const dev_cfg = port->config;  in gpio_atcgpio100_port_get_dir()
296 	map &= dev_cfg->common.port_pin_mask;  in gpio_atcgpio100_port_get_dir()
312 	struct gpio_atcgpio100_data * const data = port->data;  in gpio_atcgpio100_irq_handler()
318 	gpio_fire_callbacks(&data->cb, port, port_value);  in gpio_atcgpio100_irq_handler()
338 	const struct gpio_atcgpio100_config * const dev_cfg = port->config;  in gpio_atcgpio100_init()
347 	dev_cfg->cfg_func();  in gpio_atcgpio100_init()
350 	irq_enable(dev_cfg->irq_num);  in gpio_atcgpio100_init()