Lines Matching +full:0 +full:x00000020
13 /* Fabric Configuration Control Register, offset: 0x000 */
15 /* Maximum Bit Length Count, offset: 0x004 */
17 /* Maximum Word Length Count, offset: 0x008 */
20 /* Configuration Data, offset: 0xFFC */
26 #define FB_CFG_ENABLE ((uint32_t)(0x00000200))
27 #define FB_CFG_DISABLE ((uint32_t)(0x00000000))
29 #define CFG_CTL_APB_CFG_WR ((uint32_t)(0x00008000))
30 #define CFG_CTL_APB_CFG_RD ((uint32_t)(0x00004000))
31 #define CFG_CTL_APB_WL_DIN ((uint32_t)(0x00003C00))
32 #define CFG_CTL_APB_PARTIAL_LOAD ((uint32_t)(0x00000200))
33 #define CFG_CTL_APB_BL_SEL ((uint32_t)(0x00000100))
34 #define CFG_CTL_APB_BLM_SEL ((uint32_t)(0x00000080))
35 #define CFG_CTL_APB_BR_SEL ((uint32_t)(0x00000040))
36 #define CFG_CTL_APB_BRM_SEL ((uint32_t)(0x00000020))
37 #define CFG_CTL_APB_TL_SEL ((uint32_t)(0x00000010))
38 #define CFG_CTL_APB_TLM_SEL ((uint32_t)(0x00000008))
39 #define CFG_CTL_APB_TR_SEL ((uint32_t)(0x00000004))
40 #define CFG_CTL_APB_TRM_SEL ((uint32_t)(0x00000002))
41 #define CFG_CTL_APB_SEL_CFG ((uint32_t)(0x00000001))
43 #define FB_ISOLATION_ENABLE ((uint32_t)(0x00000001))
44 #define FB_ISOLATION_DISABLE ((uint32_t)(0x00000000))
46 #define PMU_FFE_FB_PF_SW_PD_FB_PD ((uint32_t)(0x00000002))
47 #define PMU_FB_PWR_MODE_CFG_FB_SD ((uint32_t)(0x00000002))
48 #define PMU_FB_PWR_MODE_CFG_FB_DP ((uint32_t)(0x00000001))
71 #define CFG_CTL_LOAD_DISABLE 0