4  * SPDX-License-Identifier: Apache-2.0
30  *  so define it to flash size to avoid the unexptected check.
47 	LOG_DBG("I-cache Disable");  in stm32_icache_disable()
51 	CLEAR_BIT(ICACHE->FCR, ICACHE_FCR_CBSYENDF);  in stm32_icache_disable()
60 		if ((k_uptime_get_32() - tickstart) >  in stm32_icache_disable()
66 				status = -ETIMEDOUT;  in stm32_icache_disable()
77 	LOG_DBG("I-cache Enable");  in stm32_icache_enable()
83 	int status = -EIO;  in icache_wait_for_invalidate_complete()
93 			if ((k_uptime_get_32() - tickstart) >  in icache_wait_for_invalidate_complete()
102 		LOG_DBG("I-cache Invalidation complete");  in icache_wait_for_invalidate_complete()
107 		LOG_ERR("I-cache Invalidation timeout");  in icache_wait_for_invalidate_complete()
109 		status = -ETIMEDOUT;  in icache_wait_for_invalidate_complete()
113 		LOG_ERR("I-cache error");  in icache_wait_for_invalidate_complete()
116 		status = -EIO;  in icache_wait_for_invalidate_complete()
122 /* Macro to check if the flash is Dual bank or not */
127 	(((FLASH_STM32_REGS(flash_device)->OPTR & FLASH_STM32_DBANK) \
133  * offset and len must be aligned on write-block-size for write,
170 	/* if the non-secure control register is locked,do not fail silently */  in write_nwords()
171 	if (regs->NSCR & FLASH_STM32_NSLOCK) {  in write_nwords()
173 		return -EIO;  in write_nwords()
199 				return -EIO;  in write_nwords()
205 	regs->NSCR |= FLASH_STM32_NSPG;  in write_nwords()
208 	tmp = regs->NSCR;  in write_nwords()
219 	regs->NSCR &= (~FLASH_STM32_NSPG);  in write_nwords()
231 	/* if the non-secure control register is locked,do not fail silently */  in erase_page()
232 	if (regs->NSCR & FLASH_STM32_NSLOCK) {  in erase_page()
234 		return -EIO;  in erase_page()
247 		((regs->OPTR & FLASH_OPTR_SWAP_BANK) == FLASH_OPTR_SWAP_BANK);  in erase_page()
250 			/* The pages to be erased is in bank 1 */  in erase_page()
251 			regs->NSCR &= ~FLASH_STM32_NSBKER_MSK;  in erase_page()
253 			LOG_DBG("Erase page %d on bank 1", page);  in erase_page()
255 			/* The pages to be erased is in bank 1 */  in erase_page()
256 			regs->NSCR &= ~FLASH_STM32_NSBKER_MSK;  in erase_page()
257 			page = (offset - BANK2_OFFSET) / FLASH_PAGE_SIZE;  in erase_page()
258 			LOG_DBG("Erase page %d on bank 1", page);  in erase_page()
260 			/* The pages to be erased is in bank 2 */  in erase_page()
261 			regs->NSCR |= FLASH_STM32_NSBKER;  in erase_page()
263 			LOG_DBG("Erase page %d on bank 2", page);  in erase_page()
265 			/* The pages to be erased is in bank 2 */  in erase_page()
266 			regs->NSCR |= FLASH_STM32_NSBKER;  in erase_page()
267 			page = (offset - BANK2_OFFSET) / FLASH_PAGE_SIZE;  in erase_page()
268 			LOG_DBG("Erase page %d on bank 2", page);  in erase_page()
271 			return -EINVAL;  in erase_page()
279 	regs->NSCR |= FLASH_STM32_NSPER;  in erase_page()
280 	regs->NSCR &= ~FLASH_STM32_NSPNB_MSK;  in erase_page()
281 	regs->NSCR |= (page << FLASH_STM32_NSPNB_POS);  in erase_page()
284 	regs->NSCR |= FLASH_STM32_NSSTRT;  in erase_page()
287 	tmp = regs->NSCR;  in erase_page()
293 		regs->NSCR &= ~(FLASH_STM32_NSPER | FLASH_STM32_NSBKER);  in erase_page()
295 		regs->NSCR &= ~(FLASH_STM32_NSPER);  in erase_page()
312 		 * i-cache is disabled. A write to flash performed without  in flash_stm32_block_erase_loop()
313 		 * disabling i-cache will set ERRF error flag in SR register.  in flash_stm32_block_erase_loop()
321 	for (; address <= offset + len - 1 ; address += FLASH_PAGE_SIZE) {  in flash_stm32_block_erase_loop()
329 		/* Since i-cache was disabled, this would start the  in flash_stm32_block_erase_loop()
334 		/* I-cache should be enabled only after the  in flash_stm32_block_erase_loop()
352 		 * i-cache is disabled. A write to flash performed without  in flash_stm32_write_range()
353 		 * disabling i-cache will set ERRF error flag in SR register.  in flash_stm32_write_range()
372 		/* Since i-cache was disabled, this would start the  in flash_stm32_write_range()
381 		/* I-cache should be enabled only after the  in flash_stm32_write_range()
400 		/* Short circuit calculation logic if already performed (size is known) */  in flash_stm32_page_layout()
419 				- (PAGES_PER_BANK * FLASH_PAGE_SIZE);  in flash_stm32_page_layout()
434 			/* U5 flash pages are always 8 kB in size */  in flash_stm32_page_layout()
435 			/* H5 flash pages are always 8 kB in size */  in flash_stm32_page_layout()
436 			/* Considering one layout of full flash size, even with 2 banks */  in flash_stm32_page_layout()