Lines Matching +full:- +full:n
4 * SPDX-License-Identifier: Apache-2.0
25 struct nxp_s32_qspi_data *data = dev->data; in nxp_s32_qspi_init()
26 const struct nxp_s32_qspi_config *config = dev->config; in nxp_s32_qspi_init()
28 uint8_t dev_id[memory_cfg->readIdSettings.readIdSize]; in nxp_s32_qspi_init()
33 data->instance = nxp_s32_qspi_register_device(); in nxp_s32_qspi_init()
34 __ASSERT_NO_MSG(data->instance < QSPI_IP_MEM_INSTANCE_COUNT); in nxp_s32_qspi_init()
35 data->memory_conn_cfg.qspiInstance = memc_nxp_s32_qspi_get_instance(config->controller); in nxp_s32_qspi_init()
38 k_sem_init(&data->sem, 1, 1); in nxp_s32_qspi_init()
41 if (!device_is_ready(config->controller)) { in nxp_s32_qspi_init()
43 return -ENODEV; in nxp_s32_qspi_init()
46 status = Qspi_Ip_Init(data->instance, (const Qspi_Ip_MemoryConfigType *)memory_cfg, in nxp_s32_qspi_init()
47 (const Qspi_Ip_MemoryConnectionType *)&data->memory_conn_cfg); in nxp_s32_qspi_init()
49 LOG_ERR("Fail to init memory device %d (%d)", data->instance, status); in nxp_s32_qspi_init()
50 return -EIO; in nxp_s32_qspi_init()
57 return -ENODEV; in nxp_s32_qspi_init()
60 if (memcmp(dev_id, memory_cfg->readIdSettings.readIdExpected, sizeof(dev_id))) { in nxp_s32_qspi_init()
62 return -EINVAL; in nxp_s32_qspi_init()
78 #define QSPI_PAGE_LAYOUT(n) \ argument
80 .pages_count = (DT_INST_PROP(n, size) / 8) \
85 #define QSPI_READ_ID_CFG(n) \ argument
88 .readIdSize = DT_INST_PROP_LEN(n, jedec_id), \
89 .readIdExpected = DT_INST_PROP(n, jedec_id), \
92 #define QSPI_MEMORY_CONN_CFG(n) \ argument
94 .connectionType = (Qspi_Ip_ConnectionType)DT_INST_REG_ADDR(n), \
95 .memAlignment = DT_INST_PROP(n, write_block_size) \
98 #define QSPI_ERASE_CFG(n) \ argument
121 #define QSPI_RESET_CFG(n) \ argument
127 #define QSPI_STATUS_REG_CFG(n) \ argument
140 #define QSPI_INIT_CFG(n) \ argument
146 #define QSPI_LUT_CFG(n) \ argument
152 #define QSPI_SUSPEND_CFG(n) \ argument
160 #define QSPI_MEMORY_CFG(n) \ argument
163 .hfConfig = &hyperflash_config_##n, \
164 .memSize = DT_INST_PROP(n, size) / 8, \
165 .pageSize = DT_INST_PROP(n, max_program_buffer_size), \
170 .eraseSettings = QSPI_ERASE_CFG(n), \
171 .statusConfig = QSPI_STATUS_REG_CFG(n), \
172 .resetSettings = QSPI_RESET_CFG(n), \
173 .initResetSettings = QSPI_RESET_CFG(n), \
174 .initConfiguration = QSPI_INIT_CFG(n), \
175 .lutSequences = QSPI_LUT_CFG(n), \
176 .readIdSettings = QSPI_READ_ID_CFG(n), \
177 .suspendSettings = QSPI_SUSPEND_CFG(n), \
185 #define FLASH_NXP_S32_QSPI_DRV_STRENGTH(n) \ argument
186 COND_CODE_1(DT_INST_ENUM_IDX(n, vcc_mv), \
187 (DT_INST_PROP(n, drive_strength_ohm) == 12 ? QSPI_IP_HF_DRV_STRENGTH_007 : \
188 (DT_INST_PROP(n, drive_strength_ohm) == 14 ? QSPI_IP_HF_DRV_STRENGTH_006 : \
189 (DT_INST_PROP(n, drive_strength_ohm) == 16 ? QSPI_IP_HF_DRV_STRENGTH_005 : \
190 (DT_INST_PROP(n, drive_strength_ohm) == 20 ? QSPI_IP_HF_DRV_STRENGTH_000 : \
191 (DT_INST_PROP(n, drive_strength_ohm) == 27 ? QSPI_IP_HF_DRV_STRENGTH_003 : \
192 (DT_INST_PROP(n, drive_strength_ohm) == 40 ? QSPI_IP_HF_DRV_STRENGTH_002 : \
193 (DT_INST_PROP(n, drive_strength_ohm) == 71 ? QSPI_IP_HF_DRV_STRENGTH_001 : \
195 (DT_INST_PROP(n, drive_strength_ohm) == 20 ? QSPI_IP_HF_DRV_STRENGTH_007 : \
196 (DT_INST_PROP(n, drive_strength_ohm) == 24 ? QSPI_IP_HF_DRV_STRENGTH_006 : \
197 (DT_INST_PROP(n, drive_strength_ohm) == 27 ? QSPI_IP_HF_DRV_STRENGTH_000 : \
198 (DT_INST_PROP(n, drive_strength_ohm) == 34 ? QSPI_IP_HF_DRV_STRENGTH_004 : \
199 (DT_INST_PROP(n, drive_strength_ohm) == 45 ? QSPI_IP_HF_DRV_STRENGTH_003 : \
200 (DT_INST_PROP(n, drive_strength_ohm) == 68 ? QSPI_IP_HF_DRV_STRENGTH_002 : \
201 (DT_INST_PROP(n, drive_strength_ohm) == 117 ? QSPI_IP_HF_DRV_STRENGTH_001 : \
204 #define FLASH_NXP_S32_QSPI_SECTOR_MAP(n) \ argument
205 COND_CODE_1(DT_INST_PROP(n, support_only_uniform_sectors), \
206 (DT_INST_ENUM_IDX(n, ppw_sectors_addr_mapping) ? \
209 (DT_INST_ENUM_IDX(n, ppw_sectors_addr_mapping) ? \
213 #define FLASH_NXP_S32_QSPI_INIT_DEVICE(n) \ argument
214 static Qspi_Ip_HyperFlashConfigType hyperflash_config_##n = \
216 .outputDriverStrength = FLASH_NXP_S32_QSPI_DRV_STRENGTH(n), \
217 .RWDSLowOnDualError = DT_INST_PROP(n, rwds_low_dual_error), \
218 .secureRegionUnlocked = !DT_INST_PROP(n, secure_region_locked), \
219 .readLatency = DT_INST_ENUM_IDX(n, read_latency_cycles), \
220 .paramSectorMap = FLASH_NXP_S32_QSPI_SECTOR_MAP(n), \
221 .deviceIdWordAddress = DT_INST_PROP(n, device_id_word_addr), \
223 static const struct nxp_s32_qspi_config nxp_s32_qspi_config_##n = { \
224 .controller = DEVICE_DT_GET(DT_INST_BUS(n)), \
226 .write_block_size = DT_INST_PROP(n, write_block_size), \
230 (QSPI_PAGE_LAYOUT(n),)) \
231 .memory_cfg = QSPI_MEMORY_CFG(n), \
234 static struct nxp_s32_qspi_data nxp_s32_qspi_data_##n = { \
235 .memory_conn_cfg = QSPI_MEMORY_CONN_CFG(n), \
238 DEVICE_DT_INST_DEFINE(n, \
241 &nxp_s32_qspi_data_##n, \
242 &nxp_s32_qspi_config_##n, \